Interrupt Sequence Diagram to Automaton Model Conversion
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Solution Overview
Problem
Ensuring the reliability of interrupt-driven systems is challenging due to the complexity of timing in system operations and the uncertainty of interrupt occurrences, making it difficult to detect faults like operation timeouts and data races.
Innovation Solution
Converting interrupt sequence diagrams into automaton models, allowing for the use of verification tools to validate the systems, thereby reducing modeling errors and costs, and facilitating the verification of interaction scenarios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interrupt sequence diagrams are used to model interrupt-driven systems, then the expressiveness and intuitiveness of real-time requirements are improved, but the difficulty of verification increases due to the complexity of interrupt timing and nesting
Solution Approach 1:
The patent introduces an intermediate representation (IR) as a mediator between the interrupt sequence diagram (visual model) and the automaton model (formal verification model). The IR captures the essential structure and timing constraints of the interrupt-driven system in a simplified form, enabling automated verification without requiring direct translation from complex visual diagrams to formal models. This intermediary layer reduces verification complexity while preserving the expressiveness of real-time requirements.
Solution Approach 2:
The patent segments the verification process into distinct phases: (1) modeling the interrupt sequence diagram, (2) translating to intermediate representation, (3) generating automaton model, and (4) performing verification. This segmentation allows each phase to be handled independently with appropriate tools and methods, reducing the overall complexity of the verification task while maintaining system reliability.
2Ease of operation
If automaton models are constructed directly for verification, then the verification capability is improved, but the modeling cost and error rate increase due to the complexity of constructing automata from scratch
Solution Approach 1:
The patent performs preliminary action by automatically generating the intermediate representation from the interrupt sequence diagram before automaton model construction. This pre-processing step captures the system structure and timing constraints in a standardized format, eliminating the need for manual automaton construction and reducing both modeling cost and error rate while preserving full verification capability.
Solution Approach 2:
The patent creates a copy of the system model in the form of an intermediate representation that mirrors the essential features of the interrupt sequence diagram but in a verification-friendly format. This copied model can be automatically translated to automaton without manual intervention, reducing modeling effort while maintaining verification rigor.
3Measurement precision
If the timing constraints and interrupt nesting are fully represented in the model, then the detection precision of faults is improved, but the state space size increases making verification difficult
Solution Approach 1:
The patent extracts only the essential timing constraints and interrupt nesting structures from the full system model into the intermediate representation. By selectively extracting only the critical features needed for verification (such as interrupt priorities, timing bounds, and nesting depth) while omitting unnecessary details, the state space size is reduced while maintaining sufficient precision for fault detection.
Solution Approach 2:
The patent applies partial action by representing only the necessary timing constraints and interrupt structures required for verification rather than fully modeling all system behaviors. This partial representation reduces state space complexity while maintaining adequate fault detection precision for critical interrupt-driven system properties.
Data Source
AI summary
An interrupt-driven system verification method based on interrupt sequence diagrams includes the steps of: establishing an interrupt-driven system model based on an interrupt sequence diagram, dividing interaction fragments in the obtained interrupt sequence diagram into basic interaction fragments and composite interaction fragments and sequentially converting the basic interaction fragments and the composite interaction fragments into the corresponding automaton models, combining the automaton models into one automaton model, adding the constraints in the interrupt sequence diagram to the converted automaton model, adding the verification attribute information as a constraint to the converted automaton model, describing an automaton as an input format acceptable to the automaton verification tool, and verifying the model with the automaton verification tool.


