Interrupt Simulation via Compiler Branching for Timer Timing Estimation
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Solution Overview
Problem
Existing methods for estimating the execution time of embedded programs handling interrupts are inadequate as they cannot simulate interrupt events, leading to inaccurate results due to the absence of a mechanism to handle timer interrupts.
Innovation Solution
An interrupt simulation device that utilizes program analysis technology with a compiler to simulate timer interrupts by adding a counter variable to accumulate execution time and conditional branching processes, allowing simulation without an emulator or simulator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If an emulator or simulator is used to estimate execution time of embedded programs, then the program can be tested before actual machine is available, but runtime overhead occurs and estimation takes a long time
Solution Approach 1:
The patent creates a simplified copy of the interrupt handling mechanism within the compiler's branch history information generation process. Instead of using a full emulator or simulator, it implements a lightweight counter variable that copies the essential timing behavior of timer interrupts, allowing execution time estimation without the overhead of complete simulation environments.
Solution Approach 2:
The patent extracts only the essential timing-critical aspects of interrupt behavior (counter variable incrementing and threshold comparison) from the complete interrupt handling mechanism. This extraction allows the system to simulate timer interrupt effects without incorporating the full complexity of emulator or simulator infrastructure, thereby reducing runtime overhead.
2Productivity
If program analysis technology with compiler is used to estimate execution time, then runtime overhead is avoided, but interrupt events cannot be simulated leading to inaccurate results
Solution Approach 1:
The patent performs preliminary action by integrating interrupt simulation logic directly into the compiler's branch history information generation process. The counter variable and ignition reference condition are established during compilation, enabling the program to simulate its own interrupt behavior during normal execution without requiring external simulation tools, thus maintaining both low overhead and accurate timing estimation.
Solution Approach 2:
The patent merges the interrupt simulation functionality with the existing branch history information generation process in the compiler. By combining these two functions, the system achieves execution time estimation with interrupt simulation capability without adding separate simulation infrastructure, thereby avoiding runtime overhead while maintaining measurement precision.
3Measurement precision
If interrupt simulation mechanism is added to program analysis, then accurate execution time estimation for interrupt-handling programs is achieved, but device complexity increases
Solution Approach 1:
The patent applies local quality by implementing interrupt simulation only where necessary - specifically within the branch history information generation process of the compiler. Rather than adding a comprehensive simulation mechanism throughout the system, it locally enhances the compiler with minimal additional structures (counter variable and ignition reference condition), achieving accurate interrupt timing estimation without excessive device complexity.
Data Source
AI summary
An interrupt simulation device (10) includes an accumulation addition unit (14) and a branch addition unit (15). The accumulation addition unit (14) adds an accumulation addition process to add a value corresponding to an estimated execution time of a target basic block to a counter variable corresponding to a cumulative execution time of a target program (20) when the target basic block is executed in the target program (20) in a case in which each basic block of multiple basic blocks are regarded as the target basic block when the target program (20) being a computer program is divided into the multiple basic blocks. The branch addition unit (15) adds a conditional branching process that is executed when a value of the counter variable satisfies an ignition reference condition, to the target program (20).