Interrupt Suppression Control for In-Vehicle MCU Main Process Time

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Solution Overview

Problem

In in-vehicle MCUs and SoCs, the increasing number of asynchronous communications leads to a significant increase in interrupt processes, reducing the time allocated to application processes, which can limit the functionality of main processes.

Innovation Solution

Implement an interrupt processing unit that prioritizes and suppresses lower-priority interrupt processes based on a suppression condition, using an interrupt suppression table to manage the number of interrupt processes within a cycle time, ensuring sufficient time for main processes by distributing interrupt processing across multiple cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of asynchronous communication channels is increased to improve communication capability, then the communication versatility is improved, but the time allocated to application processes is reduced due to increased interrupt processes

Engineering Contradiction:
Improvecommunication capabilityVSAvoidtime allocated to application process
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements periodic interrupt suppression for lower-priority asynchronous communication channels. The interrupt suppression control unit suppresses interrupt requests from lower-priority channels during predetermined periods when the processor is executing application processes, allowing the processor to dedicate time to high-priority tasks without being constantly interrupted by lower-priority communications

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The interrupt suppression control unit monitors the execution state of the processor and dynamically adjusts interrupt suppression based on whether the processor is executing application processes or idle. When the processor is executing application processes, the control unit suppresses lower-priority interrupts; when idle, it allows interrupts to pass through, creating a feedback-based adaptive interrupt management system

Inventive Principle:
Principle #23Feedback

2Speed

If all interrupt requests are processed immediately to improve response speed, then the interrupt response immediacy is improved, but the time for main processes is reduced

Engineering Contradiction:
Improveinterrupt response speedVSAvoidtime for main process
Core Design Contradiction:
SpeedVSDuration of action of moving object

Solution Approach 1:

The patent applies different quality characteristics to different interrupt priority levels. Higher-priority interrupt requests are processed immediately with high response speed, while lower-priority interrupt requests are suppressed during application process execution and processed during idle periods, creating localized quality differences in interrupt handling based on priority and system state

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The interrupt suppression control unit dynamically adjusts the processing behavior of interrupt requests based on the real-time execution state of the processor. The suppression condition changes from allowing interrupts during idle periods to suppressing lower-priority interrupts during application process execution, creating a dynamic interrupt management system that adapts to system state

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12625830B2Semiconductor device
Publication Date: 2026.05.12 RENESAS ELECTRONICS CORP
  • US12625830B2 patent drawing
  • US12625830B2 patent drawing
  • US12625830B2 patent drawing

AI summary

An interrupt reception unit receives an interrupt request. In response to a received interrupt request, an interrupt processing unit performs an interrupt process of a first priority or an interrupt process of a second priority having a lower priority than the first priority. An interrupt suppression control unit controls the number of interrupt processes of the second priority processed by the interrupt processing unit in a cycle time according to a suppression condition. The suppression condition is set on the basis of a cycle in which the interrupt process of the second priority occurs and the total number of the interrupt processes of the second priority occurring within a period corresponding to the cycle.