Interrupt Thread Handling in Hyperthreaded Processors

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Solution Overview

Problem

Existing methods for handling interrupt requests in processors with hyperthreading capabilities are inefficient, as they require significant time and computing power to save and restore thread contexts, leading to prolonged interruption durations and reduced performance.

Innovation Solution

A method where one thread is designated as the main thread and another as the interrupt thread, allowing the interrupt thread to handle interrupts without affecting the main thread, enabling partial execution of interrupt routines and concurrent processing, thus minimizing pipeline reloading and enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interrupt handling is performed in the main thread, then the interrupt can be processed, but the interruption duration increases and thread performance decreases

Engineering Contradiction:
Improveinterrupt handling capabilityVSAvoidinterruption duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the processor into multiple threads (main thread and interrupt thread), separating interrupt handling from the main execution flow. This segmentation allows the interrupt thread to handle interrupts independently without blocking the main thread, thereby reducing interruption duration and maintaining thread performance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If context is saved and restored from memory, then thread state is preserved, but processing time is lost

Engineering Contradiction:
Improvethread context preservationVSAvoidcontext save and restore time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-loads thread contexts into the instruction pipeline before interrupts occur. This preliminary action ensures that when an interrupt happens, the context is already available in the pipeline, eliminating the time-consuming memory access operations and allowing faster context preservation and restoration.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If instruction pipeline is emptied and refilled during interrupt, then interrupt routine is executed, but processor cycles are lost

Engineering Contradiction:
Improveinterrupt routine executionVSAvoidprocessor cycle utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent maintains continuous useful action by pre-loading interrupt routines and their required contexts into the instruction pipeline before interrupts occur. This ensures that when an interrupt is triggered, the pipeline already contains the necessary instructions, eliminating the need to empty and refill the pipeline during interrupt handling, thus preserving processor cycle utilization.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentEP2093662B1Method for processing interrupt requests in a processor
Publication Date: 2017.05.31 FUJITSU SIEMENS COMP GMBH
  • EP2093662B1 patent drawingFigure 1
  • EP2093662B1 patent drawingFigure 2
  • EP2093662B1 patent drawingFigure 3

AI summary

The method involves defining one of two threads as main thread for execution of a program, and assigning another thread as interrupt-thread to the main thread. The main thread is started through a processor, and an interrupt request is received. Interrupt data is stored in a register assigned to the interrupt thread through the processor, and a part of an interrupt routine is executed in the interrupt thread. A command pipeline of the main thread is emptied after stopping of the main thread through the interrupt thread, and an actual content of the main thread is secured.