Hardware Virtual Interrupt Delivery Without Virtual Processor Exit
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Solution Overview
Problem
Existing interrupt handling processes in virtualization technologies incur delays due to the need for virtual processors to exit and re-enter the system when virtual interrupts are transferred, leading to inefficiencies in processing requirements.
Innovation Solution
A system and method that utilize a hardware layer with a physical interrupt translation service and a generic interrupt controller to transparently transfer virtual interrupts to virtual processors without requiring the processors to exit, by using preconfigured mapping relationships to ensure accurate identification and delivery of interrupts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the VMM writes the virtual interrupt into the system register corresponding to the virtual CPU when the virtual machine exits and re-enters, then the virtual interrupt can be transferred to the virtual processor, but the processing delay is increased due to the exit and entry cycles
Solution Approach 1:
The patent pre-allocates interrupt vectors to virtual processors during system initialization, establishing mapping relationships between virtual interrupts and virtual processors in advance. This preliminary configuration eliminates the need for exit-entry cycles during interrupt handling, as the hardware layer can directly deliver interrupts based on pre-established mappings, thus reducing processing delay while maintaining transfer accuracy
Solution Approach 2:
The patent introduces a hardware layer with a physical interrupt translation service that acts as an intermediary between the VMM and virtual processors. This hardware intermediary maintains mapping relationships and directly delivers virtual interrupts to target virtual processors without requiring VM exit-entry cycles, thereby resolving the contradiction between reliable interrupt transfer and processing speed
2Reliability
If the virtual processor temporarily stops running to allow the VMM to write the virtual interrupt, then the interrupt can be properly registered, but the processing efficiency is reduced
Solution Approach 1:
The hardware layer's physical interrupt translation service autonomously maintains and manages the mapping relationships between virtual interrupts and virtual processors. This self-service capability eliminates the need for the virtual processor to stop and allow VMM intervention, as the hardware automatically handles interrupt registration and delivery based on pre-configured mappings, thus maintaining both accuracy and efficiency
Solution Approach 2:
The patent replaces the software-based interrupt handling mechanism (requiring VM exit-entry and processor suspension) with a hardware-based mechanism. The physical interrupt translation service in the hardware layer directly manages interrupt mappings and deliveries, substituting the inefficient software-controlled process with a faster hardware-operated system that maintains reliability without sacrificing productivity
Data Source
AI summary
Embodiments of the present disclosure disclose a computing device, and are applied to the field of computing devices. In the present disclosure, a virtual interrupt obtained by a host machine is mapped to a physical interrupt of a physical layer, and a virtual interrupt identifier corresponding to the physical interrupt is transferred to a virtual processor by using the physical layer. When a hardware layer transparently transmits the virtual interrupt identifier to the virtual processor, the virtual processor does not need to exit. This decreases a delay caused by exit of the virtual processor when software implements virtual interrupt routing.