Interrupt Pre-Processor Wake Logic for Low-Power CPU Sleep

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Solution Overview

Problem

Frequent waking up of the central processing unit (CPU) by peripheral devices in low power mode leads to high power consumption in micro-controller systems.

Innovation Solution

Implementing an interrupt pre-processor connected between the CPU and peripheral devices to activate the CPU only when a predetermined number of interrupt signals are received, along with temperature thresholds, and using a peripheral direct memory access device to manage data transfer when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If every component in the low power domain wakes up the central processing unit whenever it completes a task, then the central processing unit can respond to all tasks promptly, but power consumption increases due to frequent wake-ups

Engineering Contradiction:
Improvetask response capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The interrupt pre-processor is introduced as an intermediary component between peripheral devices and the CPU. It intercepts interrupt signals from peripheral devices and filters them according to predetermined conditions (interrupt priority levels and temperature thresholds) before forwarding to the CPU. This mediator approach allows the system to maintain task response capability while reducing unnecessary CPU wake-ups, thereby resolving the contradiction between reliability and power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If the central processing unit remains powered down to save power, then power consumption is reduced, but the system cannot process tasks requiring CPU intervention

Engineering Contradiction:
Improvepower consumptionVSAvoidtask processing capability
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The system performs preliminary actions by configuring interrupt priority levels and temperature thresholds in advance before the CPU enters power-saving mode. The interrupt pre-processor uses these pre-set conditions to automatically filter and manage interrupt signals. This preliminary configuration enables the system to maintain task processing capability during CPU power-down states by handling routine interrupts autonomously, thus resolving the contradiction between power savings and productivity.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If the interrupt pre-processor filters interrupt signals based on predetermined conditions, then unnecessary CPU wake-ups are reduced, but the device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem structure
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The interrupt pre-processor is designed to operate autonomously without requiring CPU intervention for routine interrupt filtering. It self-manages the interrupt signal filtering process by comparing incoming interrupts against pre-configured priority levels and temperature thresholds. This self-service capability reduces the overall system complexity burden on the CPU while achieving power consumption reduction, as the pre-processor handles filtering tasks independently.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20260016877A1Micro-controller system and method for waking up the central processing unit
Publication Date: 2026.01.15 NUVOTON
  • US20260016877A1 patent drawing
  • US20260016877A1 patent drawing
  • US20260016877A1 patent drawing

AI summary

A micro-controller system including a central processing unit, a peripheral device, and an interrupt pre-processor is provided. The interrupt pre-processor is connected between the central processing unit and the peripheral device. When the central processing unit is powered down, the interrupt pre-processor is configured to receive an interrupt signal from the peripheral device and output a wake-up signal to activate the central processing unit when the number of times that the interrupt pre-processor receives the interrupt signal from the peripheral device is higher than or equal to the first predetermined number.