Interrupted Trench Isolation for Semiconductor Current Sensors

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Solution Overview

Problem

Current semiconductor devices face challenges in isolating current sense cells from power transistor cells, leading to undesirable capacitive coupling and complex insulation constructions, particularly in stripe trench configurations, which complicates device design and performance.

Innovation Solution

The solution involves forming a semiconductor device with power and current sense regions, where second trenches are interrupted along opposite sides of the current sense region, and using trench interruptions and cross-trenches to simplify isolation, minimizing parasitic couplings and capacitive interference, and potentially omitting lithography steps for body and mesa implants.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If continuous trenches with field plates are used to separate power device region from current sense region, then insulation between regions is improved, but capacitive coupling between main cells and current sense cells increases

Engineering Contradiction:
Improveinsulation between regionsVSAvoidcapacitive coupling
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The continuous second trenches are divided into separate segments by interrupting them along opposite sides of the current sense region. This segmentation prevents the formation of a continuous field plate structure that would create capacitive coupling paths, while still maintaining adequate insulation between power device and current sense regions through the distributed trench structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The trench interruption strategy applies different configurations to different regions: continuous trenches are used where insulation is critical, while interrupted trenches are used adjacent to the current sense region where capacitive coupling must be minimized. This local differentiation optimizes both insulation and coupling reduction in their respective zones.

Inventive Principle:
Principle #3Local quality

2Reliability

If different accumulation and inversion layers are formed at the gate for isolation, then insulation between main cells and current sense cells is improved, but device design complexity increases

Engineering Contradiction:
Improveinsulation between cellsVSAvoidinsulation construction
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the isolation function from the complex gate layer structure (accumulation and inversion layers) and implements it through a simpler physical separation mechanism using interrupted trenches. This removes the need for complex layered gate constructions while maintaining effective electrical isolation between cells.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If polysilicon field plates are continuous between power device and current sense region, then field control is improved, but parasitic pnp structure formation increases

Engineering Contradiction:
Improvefield controlVSAvoidparasitic pnp structure
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The continuous field plate is segmented into discrete sections by interrupting the second trenches. This prevents the formation of parasitic pnp structures that would arise from continuous polysilicon coverage spanning across the current sense region, while still providing adequate field control within each segmented area through localized field plates.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11495680B2Semiconductor device with integrated current sensor
Publication Date: 2022.11.08 INFINEON TECH AUSTRIA AG
  • US11495680B2 patent drawing
  • US11495680B2 patent drawing
  • US11495680B2 patent drawing

AI summary

Described herein is a power semiconductor device and corresponding method of production. The semiconductor device includes: a power device region formed in a semiconductor substrate and including first trenches and second trenches extending lengthwise in parallel with one another with semiconductor mesas between adjacent ones of the trenches, each first trench including a gate electrode at a first potential and each second trench including a field plate at a second potential; and a current sense region formed in the semiconductor substrate. A subset of the first trenches, a subset of the second trenches and a subset of the semiconductor mesas are common to both the current sense region and the power device region. The second trenches are interrupted along opposite first and second sides of the current sense region such that the field plates are interrupted between the power device region and the current sense region.