Interruptible GPU Context Switching via Run Lists
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Solution Overview
Problem
Current graphics processing units (GPUs) face challenges in efficiently handling multiple graphically intensive applications simultaneously due to inefficient scheduling and lack of mechanisms for precise interruption, leading to bottlenecks when resources are shared among applications.
Innovation Solution
A GPU is configured to be interruptible, allowing it to switch between multiple contexts by creating a run list with ring buffers and command stream processors, enabling efficient processing and memory access management to handle multiple applications concurrently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a GPU executes operations in serialized order as received, then the GPU can process operations sequentially without complex scheduling, but the GPU becomes a bottleneck when multiple applications with differing priorities need to access the same resources
Solution Approach 1:
The patent segments the processing workflow into distinct phases: command submission phase, command execution phase, and result retrieval phase. Multiple applications can submit commands asynchronously to a command queue while the GPU executes them in order, allowing prioritization and pre-fetching without disrupting the execution sequence. This segmentation enables complex scheduling behavior at the submission level while maintaining simple ordered execution at the processing level.
2Productivity
If a GPU is configured for precise interruption and context switching, then the GPU can efficiently handle multiple applications concurrently, but the device complexity increases due to additional hardware components like reorder buffers and extra pipeline stages
Solution Approach 1:
The patent implements pre-fetching mechanisms that anticipate future command needs and prepare data in advance. When the GPU is about to execute a command that requires data from memory, the system proactively fetches that data beforehand, hiding memory latency. This preliminary action allows the GPU to maintain high throughput without requiring complex interruption mechanisms, as the pipeline remains continuously fed with ready data.
3Ease of operation
If a GPU processes calculation-heavy graphics operations to free the CPU, then the CPU can perform other functions, but the GPU becomes a bottleneck when multiple applications attempt to use the GPU simultaneously
Solution Approach 1:
The patent introduces a command queue and descriptor ring buffer as intermediary structures between the CPU and GPU. Applications submit standardized command descriptors to the queue, which the GPU processes in order. This intermediary layer decouples the CPU from direct GPU control, allowing the CPU to efficiently hand off tasks without managing detailed GPU operations. Multiple applications can interact with this standardized interface simultaneously, improving GPU resource utilization while maintaining CPU simplicity.
Data Source
AI summary
A graphics processing unit (“GPU”) is configured to interrupt processing of a first context and to initiate processing of a second context upon command so that multiple programs can be executed by the GPU. The CPU creates and the GPU stores a run list containing a plurality of contexts for execution, where each context has a ring buffer of commands and pointers for processing. The GPU initiates processing of a first context in the run list and retrieves memory access commands and pointers referencing data associated with the first context. The GPU's pipeline processes data associated with first context until empty or interrupted. If emptied, the GPU switches to a next context in the run list for processing data associated with that next context. When the last context in the run list is completed, the GPU may switch to another run list containing a new list of contexts for processing.