Intersecting Metal Pattern Segments for Charge Dispersion in 3D Memory
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Solution Overview
Problem
The reliability of the manufacturing process for three-dimensional semiconductor memory devices deteriorates as the number of stacked memory cells increases, leading to stability issues in the semiconductor memory device manufacturing process.
Innovation Solution
A semiconductor memory device design featuring a metal pattern with intersecting line parts buried in a source structure, where the metal pattern includes first line parts extending in one direction and a second line part extending in a perpendicular direction to connect the first line parts, along with a slit and conductive patterns, improves the dispersion of charges during the manufacturing process, reducing defects and enhancing process stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the stacked number of memory cells is increased to improve the degree of integration, then the degree of integration is improved, but the reliability of the manufacturing process deteriorates
Solution Approach 1:
The metal pattern is segmented into multiple line parts (first line parts extending in a first direction and second line parts extending in a second direction) that are distributed within the source structure. This segmentation allows charges to be dispersed across multiple discrete conductive elements rather than concentrated in a single structure, improving charge dispersion efficiency while maintaining manufacturing reliability even as memory cell stacking increases
Solution Approach 2:
The metal pattern transitions from a single-directional linear structure to a multi-dimensional grid-like structure with line parts extending in both first and second directions. This dimensional expansion increases the spatial distribution of the metal pattern within the source structure, enhancing charge dispersion capability and contributing to manufacturing process stability despite increased memory cell density
2Productivity
If the stacked number of memory cells is increased to improve the degree of integration, then the degree of integration is improved, but process defects increase
Solution Approach 1:
The metal pattern is divided into multiple discrete line parts arranged in different directions, which segments the charge accumulation paths. This segmentation prevents localized charge buildup that could cause manufacturing defects, thereby reducing process defects while enabling higher memory cell stacking to improve integration
Solution Approach 2:
The metal pattern acts as an intermediary charge dissipation structure embedded within the source structure. By providing multiple conductive pathways through the intersecting line parts, it mediates charge accumulation during manufacturing processes, reducing the occurrence of process defects associated with high-density stacked memory cells
Data Source
AI summary
There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes a metal pattern including a first line part extending in a first direction and a second line part which is connected to the first line part and extends in a second direction to intersect with the first line part, and a source structure which has a trench. The metal pattern is formed in the trench and the source structure is in contact with a sidewall of the metal pattern.


