Intra-code word wear leveling for memory cells
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory cells in memory devices wear out faster due to uneven access operations, leading to premature degradation and error corruption in certain regions, as some cells are subjected to a higher concentration of access operations, necessitating resource dedication for error correction and data storage.
Innovation Solution
Implementing intra-code word wear leveling techniques by rotating the logical to physical channel mapping of code words, using a rotation index to redistribute access operations across physical memory locations, thereby leveling wear across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory access operations are used without wear leveling, then access speed and simplicity are improved, but memory cell lifespan and reliability deteriorate due to uneven wear distribution
Solution Approach 1:
The patent implements dynamic remapping of logical memory addresses to physical memory cell addresses. The remapping configuration is adjusted based on wear indicators from different physical regions, allowing the system to adaptively redirect access operations away from worn regions. This dynamic adjustment extends memory cell lifespan while maintaining relatively simple access operations through the logical address interface.
Solution Approach 2:
The system changes the mapping parameter between logical and physical addresses based on wear conditions. When certain physical regions show high wear indicators, the remapping configuration is modified to redistribute access operations to less worn regions. This parameter change approach extends reliability without requiring complex access operation management from the user perspective.
2Reliability
If frequent remapping operations are performed to redistribute access operations, then wear leveling effectiveness is improved, but processing overhead and system performance deteriorate
Solution Approach 1:
The patent employs periodic wear assessment and remapping updates rather than continuous operations. The controller periodically evaluates wear indicators from physical memory regions and adjusts the remapping configuration accordingly. This periodic approach ensures uniform wear distribution while minimizing processing overhead by avoiding constant remapping operations, thus maintaining access operation throughput.
Solution Approach 2:
The system performs preliminary wear assessment during idle periods or background operations before remapping is needed. By proactively monitoring wear indicators and preparing remapping configurations in advance, the system achieves effective wear leveling without causing performance degradation during active access operations. The remapping is applied before wear becomes critical, preventing the need for urgent reallocation that would impact throughput.
Data Source
AI summary
Methods, systems, and devices for spare substitution in a memory system are described. Aspects include a memory device identifying a rotation index that indicates a first assignment of logical channel to physical channels for code words stored in a memory medium. The memory device may use a pointer to indicate one or more code word addresses that are to be rotated and update a value of the pointer associated with a range for the rotation index based on a condition being satisfied. The memory device may rotate a first code word according to a first assignment of the rotation index, where the rotating may occur at an address of the memory medium corresponding to the updated value of the pointer. Additionally, the memory device may execute access operations on the memory medium that include multiplexing multiple logical channels to multiple physical channels based on the rotation index and the pointer.