Video Encoder Intra Mode Selection Pipeline Optimization

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Solution Overview

Problem

Current video encoding techniques face inefficiencies in intra mode selection, leading to processing delays and performance inefficiencies, especially when selecting between modes with similar distortion and bit rates, which can result in wasted clock cycles and reduced computational efficiency.

Innovation Solution

The solution involves determining processing performance costs for multiple intra modes based on reference blocks and their order, combining these costs with quality and bit rate metrics to select the intra coding mode that minimizes total costs, and reordering block encoding to reduce processing delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional intra mode selection is used, then compression efficiency is maintained, but processing delays and computational inefficiencies increase

Engineering Contradiction:
Improveencoding speedVSAvoidprocessing delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores processing performance costs for each intra mode before actual encoding. By determining the processing order of reference blocks in advance and calculating the costs associated with each mode ahead of time, the encoder can quickly select the most efficient mode without real-time computation delays, thus improving encoding speed while reducing processing delays.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic mode selection by evaluating multiple intra modes and their associated processing performance costs. Instead of using a fixed mode selection strategy, the system dynamically determines the optimal mode based on calculated costs that account for reference block processing orders, allowing the encoder to adaptively optimize both speed and delay performance for each coding unit.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If multiple intra modes are evaluated, then mode selection accuracy improves, but computational complexity increases

Engineering Contradiction:
Improvemode selection accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent pre-calculates processing performance costs for all available intra modes before making the final mode selection. By determining the processing order of reference blocks in advance and computing the costs associated with each mode ahead of time, the system reduces real-time computational complexity while maintaining accurate mode selection based on comprehensive cost evaluation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses simplified cost metrics and approximations for evaluating intra modes rather than performing exhaustive quality assessments. By using processing performance costs based on reference block processing orders as a proxy for full quality evaluation, the system achieves adequate mode selection accuracy with reduced computational complexity, sacrificing some precision for efficiency.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Productivity

If reference blocks are processed in default order, then encoding simplicity is maintained, but processing bubbles and delays occur

Engineering Contradiction:
Improvepipeline efficiencyVSAvoidencoding simplicity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent determines the processing order of reference blocks in advance, before actual encoding begins. By pre-calculating the optimal processing sequence that minimizes processing bubbles and delays, the system can organize the encoding pipeline efficiently without introducing complex real-time scheduling logic, thus improving pipeline efficiency while maintaining operational simplicity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic processing order optimization by evaluating different reference block processing sequences and selecting the one that minimizes processing delays. Instead of using a fixed default processing order, the system dynamically determines the optimal order based on the specific coding context and reference block dependencies, improving pipeline efficiency while adapting to different encoding scenarios.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10341664B2Configurable intra coding performance enhancements
Publication Date: 2019.07.02 INTEL CORP
  • US10341664B2 patent drawing
  • US10341664B2 patent drawing
  • US10341664B2 patent drawing

AI summary

Techniques related to intra coding performance enhancements discussed. Such techniques may include determining intra coding modes based in part on processing performance costs associated with available intra modes and/or generating a block encode order based on intra coding modes, performing encoding, and re-ordering the encoded blocks to a default coding order for bitstream insertion.