Inverse Class-F Filter Circuit for Doherty Amplifier Phase Control

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Solution Overview

Problem

Conventional Doherty power amplifier designs face efficiency and bandwidth limitations due to impedance transformation and phase shift challenges, particularly when using inverse class-F circuits, which lead to suboptimal performance in high-power applications.

Innovation Solution

Incorporating an inverse class-F filter circuit with negative susceptance at the 2F0 cold point in the carrier amplifier path, which compensates for phase delays and impedance modulation effects, allowing for increased package plane impedance and reduced phase shift, thereby enhancing efficiency and bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If impedance transformation is performed on the PCB using conventional designs, then the package plane impedance can be transformed, but the PCB becomes lossy due to high currents and I2R losses, limiting efficiency and RF bandwidth

Engineering Contradiction:
ImproveI2R losses on PCBVSAvoidRF bandwidth
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent extracts the impedance transformation function from the PCB and relocates it to the packaged device. By implementing the impedance transformation network within the package, the high-current path is removed from the PCB, eliminating I2R losses while preserving the required impedance transformation for Doherty operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary impedance transformation network within the packaged device that acts as a mediator between the package plane and the PCB. This intermediary structure performs the impedance transformation locally, preventing high currents from flowing through the PCB and reducing energy losses.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conventional inverse class-F circuits are used for impedance transformation, then impedance matching can be achieved, but phase delays are introduced that degrade Doherty amplifier performance

Engineering Contradiction:
Improveimpedance matchingVSAvoidphase delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the electrical parameters of the impedance transformation network by using distributed element structures with optimized characteristic impedances and electrical lengths. This allows the network to provide both impedance transformation and controlled phase shift, reducing the detrimental phase delays while maintaining impedance matching.

Inventive Principle:
Principle #35Parameter changes

3Volume of moving object

If the carrier amplifier path is made compact, then device size is reduced, but phase shift accumulation increases which limits bandwidth

Engineering Contradiction:
Improvedevice sizeVSAvoidbandwidth
Core Design Contradiction:
Volume of moving objectVSAdaptability or versatility

Solution Approach 1:

The patent transitions from planar PCB-based impedance transformation to a three-dimensional packaged structure with multiple signal paths at different physical levels. This dimensional change allows for shorter electrical lengths and reduced phase accumulation while maintaining compact overall device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9531328B2Amplifiers with a short phase path, packaged RF devices for use therein, and methods of manufacture thereof
Publication Date: 2016.12.27 NXP USA INC
  • US9531328B2 patent drawing
  • US9531328B2 patent drawing
  • US9531328B2 patent drawing

AI summary

An embodiment of a packaged radio frequency (RF) amplifier device includes a transistor and an inverse class-F circuit configured to harmonically terminate the device. The transistor has a control terminal and first and second current carrying terminals. The control terminal is coupled to an input lead of the device, and the first current carrying terminal is coupled to a voltage reference. The inverse class-F circuit is coupled between the second current carrying terminal and an output lead. The inverse class-F circuit includes a shunt circuit coupled between a cold point node and the voltage reference, where the cold point node corresponds to a second harmonic frequency cold point for the device. The shunt circuit adds a shunt negative susceptance at a fundamental frequency F0 to the inverse class-F circuit.