Inversion Encoding Circuit for Non-Volatile Memory Power Reduction
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Solution Overview
Problem
Non-volatile memory devices face challenges in increasing storage capacity and operating speed while maintaining performance, as existing encoding schemes struggle to optimize power dissipation and noise reduction with growing data bus speeds and sizes.
Innovation Solution
The implementation of inversion encoding schemes, including AC and DC inversion encoding circuits with parallel processing, reduces bit transitions and power consumption by using a data bus inversion (DBI) signal to determine whether data lines should be inverted, thereby optimizing power dissipation and noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data bus speed and size are increased to improve storage capacity and performance, then storage capacity and operating speed are improved, but power dissipation and noise increase
Solution Approach 1:
The patent applies inversion encoding where data bits are inverted based on the DBI signal. When DBI is high, all data bits on the bus are inverted before transmission. This inversion strategy reduces the number of bit transitions, thereby reducing power dissipation and noise while maintaining the same storage capacity and speed performance
Solution Approach 2:
The patent changes the encoding parameter by introducing a data bus inversion (DBI) signal that controls whether data bits are transmitted in their original or inverted state. This parameter change allows the system to reduce bit transitions and optimize power dissipation while maintaining productivity
2Productivity
If data bus speed and size are increased to improve storage capacity and performance, then storage capacity and operating speed are improved, but noise increases
Solution Approach 1:
The patent applies inversion encoding where data bits are inverted based on the DBI signal. When DBI is high, all data bits on the bus are inverted before transmission. This inversion strategy reduces the number of bit transitions, thereby reducing power dissipation and noise while maintaining the same storage capacity and speed performance
3Loss of energy
If inversion encoding is implemented to reduce bit transitions and power consumption, then power dissipation is reduced, but device complexity increases
Solution Approach 1:
The patent segments the inversion encoding function into separate components: a DBI signal generation unit and a data inversion unit. The DBI signal is generated based on detection of bit transitions, and this signal controls the inversion of data bits. This segmentation allows the system to reduce power dissipation while managing complexity through modular design
Solution Approach 2:
The patent implements feedback by using the detected bit transition information to generate the DBI signal, which then controls the inversion of subsequent data bits. This feedback mechanism allows the system to adaptively reduce power dissipation based on actual transmission conditions while managing complexity through automated control
Data Source
AI summary
An inversion encoder is configured to receive a plurality of bytes of data for parallel output to a data bus; determine, in parallel, Hamming distances of neighboring pairs of bytes of the received plurality of bytes of data; for each neighboring pair of bytes of the received plurality of bytes, determine, in parallel, for each of the neighboring pairs of bytes, whether a respective Hamming distance satisfies a majority function; if a respective Hamming distance for a particular pair of bytes of the neighboring pairs of bytes satisfies the majority function: set an inversion bit for a second byte of the particular pair of bytes to be the opposite of an inversion bit for a first byte of the particular pair of bytes; invert, or forgo inverting, the second byte based on the inversion bit for the second byte; and provide the second byte for output to the data bus.