Inverted Compressor Adder Circuit for Faster Low-Power Arithmetic
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Solution Overview
Problem
Existing compressor and adder circuits in multipliers and image processing applications face inefficiencies and limitations in improving performance.
Innovation Solution
The proposed solution involves a compressor and adder circuit configuration that includes a first and second adder circuit, where the first adder circuit outputs inverted sum and carry values, and the second adder circuit further processes these inverted signals to produce additional inverted sum and carry values, utilizing a carry circuit and an AND circuit with control signals to enhance operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional adder circuits are used in compressors, then basic addition operations can be performed, but power consumption is high and computing speed is limited
Solution Approach 1:
The patent inverts the conventional adder circuit operation by computing the difference between the larger and smaller numbers instead of their sum. The circuit calculates (A - B) where A and B are the two numbers, then uses this difference to determine the output. This inversion allows the circuit to avoid certain carry propagation operations that consume power and time, thereby reducing power consumption and increasing computing speed while maintaining correct computational results for the compressor function.
Solution Approach 2:
The patent changes the operational parameters of the adder circuit by modifying the control signals and operation modes. Instead of performing standard addition, the circuit operates in a differential mode with adjusted control logic that switches between addition and subtraction based on input magnitude relationships. This parameter change optimizes the circuit's power consumption profile and computational speed for compressor applications.
2Device complexity
If standard adder circuits are used, then sum and carry values can be obtained, but the circuit complexity increases without sufficient performance improvement
Solution Approach 1:
The patent inverts the conventional adder circuit operation by computing the difference between the larger and smaller numbers instead of their sum. The circuit calculates (A - B) where A and B are the two numbers, then uses this difference to determine the output. This inversion allows the circuit to avoid certain carry propagation operations that consume power and time, thereby reducing power consumption and increasing computing speed while maintaining correct computational results for the compressor function.
Solution Approach 2:
The patent changes the operational parameters of the adder circuit by modifying the control signals and operation modes. Instead of performing standard addition, the circuit operates in a differential mode with adjusted control logic that switches between addition and subtraction based on input magnitude relationships. This parameter change optimizes the circuit's power consumption profile and computational speed for compressor applications.
Data Source
AI summary
A compressor, an adder circuit, and an operation method thereof are provided. The compressor includes a first adder circuit and a second adder circuit. The first adder circuit receives a plurality of input values. The first adder circuit outputs a first inverted sum value (an inverted signal of a sum value) and a first inverted carry value (an inverted signal of a carry value). One of a plurality of input terminals of the second adder circuit is coupled to the first adder circuit to receive one of the first inverted sum value and the first inverted carry value. The second adder circuit outputs a second inverted sum value and a second inverted carry value.