Inverted IGBT With Buried Polysilicon Gate For Front-Side Integration
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Solution Overview
Problem
Conventional IGBT structures with a vertical collector configuration face challenges in integrating the collector from a substrate to a front side, making it difficult for integration processes and requiring modifications to accommodate conventional isolation techniques.
Innovation Solution
The IGBT structure features a polysilicon gate buried in a deep trench with a collector at an upper position, allowing for easier integration and compatibility with front-side processing, along with a conductive plug for heat dissipation and improved thermal resistance, utilizing a specific manufacturing method involving multiple conductivity type regions and oxide layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional vertical IGBT structure with collector at lower position is used, then the device structure is simple, but it is difficult to lead the collector from substrate to front side and requires modifications for conventional isolation techniques
Solution Approach 1:
The patent inverts the conventional IGBT structure by placing the collector at the upper position and the emitter at the lower position. This inversion allows the collector to be led out from the front side along with the emitter, eliminating the need for modifications to conventional isolation techniques and simplifying the integration process.
Solution Approach 2:
The patent introduces a deep trench structure that extends vertically through the device, creating a new dimensional pathway for the polysilicon gate. This allows the gate to be buried deep within the structure while still enabling front-side lead-out for both collector and emitter, resolving the integration difficulty without increasing overall structural complexity.
2Adaptability or versatility
If a deep trench with polysilicon gate is used, then integration compatibility is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent forms the deep trench and deposits the polysilicon gate material before completing the doping and metallization steps. This preliminary action allows the gate structure to be established early in the process, enabling subsequent steps to proceed with standard techniques and reducing overall manufacturing complexity.
Solution Approach 2:
The polysilicon gate acts as an intermediary structure that fills the deep trench and provides both electrical functionality and structural support. This intermediary element enables the device to achieve front-side lead-out capability without requiring complex modifications to the manufacturing process.
3Ease of operation
If the collector is positioned at the upper position, then front-side lead-out is enabled, but the thermal management requirements increase
Solution Approach 1:
The patent replaces traditional thermal management approaches with a conductive plug structure that extends from the upper collector region down to the substrate. This conductive pathway substitutes for conventional heat sinks or thermal vias, enabling efficient heat dissipation while maintaining the inverted structure that allows front-side lead-out.
Data Source
AI summary
An insulated gate bipolar transistor includes a substrate; a first conductivity type base disposed on the substrate and having a first trench; a first conductivity type buffer region disposed in the first conductivity type base; a collector doped region having a second conductivity type and disposed in the first conductivity type base; a second conductivity type base to which the first trench extends downwardly; a gate oxide layer disposed on an inner surface of the first trench; a polysilicon gate disposed inside the gate oxide layer; an emitter doped region having a first conductivity type and disposed in the second conductivity type base and under the first trench; a conductive plug extending downwardly from above the first trench and contacting the second conductivity type base; and an insulating oxide layer filled in the first trench, the insulating oxide layer insulating and isolating the polysilicon gate from the emitter doped region.