Inverted Isolation Leads for Lower E-Field During HV Testing
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Solution Overview
Problem
Conventional packaged semiconductor isolation devices face challenges during high voltage (HV) testing due to electric field (E field) extension into the air external to the package, leading to potential current leakage and test failures.
Innovation Solution
The solution involves maximizing the mold compound thickness between the die pads and the external leads by raising the vertical position of the die pads relative to the lead bends, thereby reducing the E-field intensity during testing and in-field use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the die pads are positioned at conventional height relative to external leads, then the package structure is simpler and manufacturing is easier, but the E-field intensity in the air gap increases causing air ionization and test failures
Solution Approach 1:
The patent applies dimensional change by vertically positioning the die pads at a higher elevation relative to the external leads, creating additional vertical spacing. This dimensional adjustment increases the distance between high-voltage regions and the air gap, thereby reducing E-field intensity and preventing air ionization during HV testing without fundamentally changing the package structure
2Object-affected harmful factors
If the mold compound thickness between die pads and external leads is increased by raising die pads, then the E-field intensity is reduced and air ionization is minimized, but the manufacturing process becomes more complex
Solution Approach 1:
The patent applies local quality by selectively increasing the mold compound thickness only in the critical region between the die pads and external leads, rather than uniformly throughout the entire package. This localized approach reduces E-field intensity and prevents air ionization in the high-risk area while minimizing the overall manufacturing complexity and material usage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the E-field intensity in the air gap, minimizing the risk of air ionization and test failures, thus enhancing the safety and reliability of packaged multichip ISO devices.
Implementation Method 1
the device can still transfer information encoded in the desired AC signal across the isolation barrier from one die to the other by capacitive coupling
Implementation Method 2
the device can still transfer information encoded in the desired AC signal across the isolation barrier from one die to the other by capacitive coupling, inductive coupling (transformer isolation)
Implementation Method 3
the electric field (E field) generated during HV testing of the ISO device extends into the air external to the mold compound of the ISO device package
Data Source
AI summary
A packaged multichip isolation device includes leadframe including a first and second die pad, with a first and second lead extending outside a molded body having a downward extending lead bend near their outer ends. A first integrated circuit (IC) die on the first die pad has a first bond pad connected to the first lead that realizes a transmitter or receiver. A second IC die on the second die pad has a second bond pad connected to the second lead that realizes another of the transmitter and receiver. An isolation component is in a signal path of the isolation device including a capacitive isolator, or inductors for transformer isolation on or between the die. A midpoint of the thickness of the die pad is raised above a top level of the leads and in an opposite vertical direction relative to the downward extending bend of the external leads.