Inverted T-Shaped FinFET Memory Leakage Reduction
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Solution Overview
Problem
Conventional FINFET memory cells suffer from excessive control gate leakage current due to the extrusion of the control gate electrode into dielectric isolation regions, leading to reliability issues and data retention problems.
Innovation Solution
The FINFET memory cell design is modified to eliminate the extrusion portion of the control gate electrode by forming an inverted T-shaped fin structure, where the dielectric isolation regions are separated from the control gate electrode by a tunnel oxide and charge trapping layer, reducing leakage current and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the control gate electrode is extended into dielectric isolation regions to improve gate control, then the gate control ability is improved, but control gate leakage current increases excessively
Solution Approach 1:
The control gate electrode is segmented into two distinct parts: a first control gate electrode portion positioned over the fin structure that provides gate control, and a second control gate electrode portion positioned over the dielectric isolation region that provides mechanical support. This segmentation allows each portion to perform its specific function without the harmful interaction of extending the control portion into the isolation region, thereby reducing leakage current while maintaining gate control ability.
2Productivity
If the feature size is reduced to increase device density, then device density is improved, but short-channel effects degrade gate control
Solution Approach 1:
The invention transitions from a conventional planar gate structure to a three-dimensional gate-all-around fin structure. The fin extends vertically from the substrate, and the control gate electrode wraps around the fin from multiple sides, providing control from the front, back, and sidewalls. This dimensional change allows effective gate control with shorter channel lengths, enabling higher device density while maintaining reliability.
3Stability of the object's composition
If the control gate electrode is extended into dielectric isolation regions to improve mechanical support, then mechanical stability is improved, but leakage current and threshold voltage shifts increase
Solution Approach 1:
The invention extracts the mechanical support function from the control gate electrode by introducing a separate second control gate electrode portion that is positioned over the dielectric isolation region. This allows the first control gate electrode portion to be kept short and not extend into the isolation region, thereby preventing leakage current and threshold voltage shifts while the second portion provides the necessary mechanical support.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces control gate leakage current and threshold voltage shifts, enhancing the reliability and data retention characteristics of the FINFET memory cells.
Implementation Method 1
the dielectric isolation regions are separated from the control gate electrode by a tunnel oxide and charge trapping layer, reducing leakage current
Data Source
AI summary
Methods for fabricating an electronic device and electronic devices therefrom are provided. A method includes forming one or more masking layers on a semiconducting surface of a substrate and forming a plurality of dielectric isolation features and a plurality of fin-type projections using the masking layer. The method also includes processing the masking layers and the plurality of fin-type projections to provide an inverted T-shaped cross-section for the plurality of fin-type projections that includes a distal extension portion and a proximal base portion. The method further includes forming a plurality of bottom gate layers on the distal extension portion and forming a plurality of control gate layers on the plurality of dielectric isolation features and the plurality of bottom gate layers.