Inverted T-Shaped Floating Gate for Flash Memory Isolation
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Solution Overview
Problem
The miniaturization of back-end-of-line structures in flash memory semiconductor devices poses challenges in maintaining the isolation and efficiency of floating gates, leading to issues with reducing the size of metallization and preventing shorting between adjacent floating gates.
Innovation Solution
A process involving the formation of an inverted T-shaped floating gate structure using a combination of polysilicon, carbon, and nitride layers, with precise etching and spacer mask techniques to create a self-aligned, isolated floating gate that prevents shorting and maintains efficient charge storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the size of back-end-of-line structures is reduced to miniaturize flash memory devices, then the device size is reduced, but the isolation and efficiency of floating gates deteriorates leading to potential shorting between adjacent floating gates
Solution Approach 1:
The floating gate structure is segmented into multiple isolated regions using deep trenches filled with dielectric material. Each floating gate is separated by these trenches, ensuring electrical isolation even when devices are miniaturized. The segmentation prevents shorting between adjacent floating gates while maintaining small device footprint.
Solution Approach 2:
The patent applies different materials and structures to different regions: polysilicon for the floating gate, carbon for charge storage, nitride for isolation, and dielectric material for trench filling. This local differentiation of material properties ensures that each region performs its specific function optimally - charge storage, isolation, and structural support - thereby maintaining reliability in miniaturized devices.
2Reliability
If tight tolerances are maintained between adjacent floating gates to prevent shorting, then reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent employs preliminary patterning actions where spacer masks are formed first, followed by etching of trenches, and then filling with dielectric material before final floating gate formation. This preliminary structuring establishes precise geometric boundaries early in the process, ensuring tight tolerances are achieved without requiring complex real-time control during subsequent manufacturing steps.
Solution Approach 2:
Spacer masks serve as intermediary structures that define the precise locations and dimensions of trenches and floating gates. These intermediary spacers act as self-aligned templates, transferring dimensional accuracy from the patterning step to the final device structure, thereby simplifying the manufacturing process while maintaining tight tolerances.
3Reliability
If the floating gate structure is isolated to prevent shorting, then reliability is improved, but charge storage efficiency may deteriorate
Solution Approach 1:
The patent implements a nested structure where the carbon charge storage layer is positioned within the polysilicon floating gate, which itself is surrounded by nitride isolation layers and dielectric-filled trenches. This nesting allows the floating gate to be electrically isolated from adjacent structures while the inner carbon layer maintains its charge storage function, as the isolation occurs at outer layers rather than within the charge storage region.
Solution Approach 2:
The floating gate structure uses composite materials - polysilicon for the gate structure, carbon for charge storage, nitride for isolation, and dielectric for trench filling. Each material contributes its specific properties: polysilicon provides structural integrity and electrical connectivity, carbon provides charge storage capacity, nitride provides electrical isolation, and dielectric provides mechanical support. This composite approach allows simultaneous achievement of isolation and charge storage efficiency.
Data Source
AI summary
A process may include forming a polysilicon pinnacle above and on a polysilicon island and further forming a floating gate from the polysilicon pinnacle and polysilicon island. The floating gate can bear an inverted T-shape. The floating gate can also be disposed above an isolated semiconductive substrate such as in a shallow-trench isolation semiconductive substrate. Electronic devices may include the floating gate as part of a field effect transistor.