Inverted-Trench FET with Conductive P+ Substrate
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Solution Overview
Problem
Conventional semiconductor power devices face challenges in reducing source inductance, leading to increased manufacturing costs and inefficiencies due to large cell pitch and lateral diffusion, which result in high on-resistance and complex fabrication processes.
Innovation Solution
An inverted ground-source trenched FET structure on a highly doped P+ substrate with a bottom-source and top-drain configuration, utilizing an integrated body-source short structure at the bottom of trenches surrounded by gate electrodes, eliminates the need for bond-wires and deep resistive sinkers, reducing source inductance and on-resistance while allowing for scalable and reliable performance across various voltage ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bond-wires are used for electrical connections in the package, then the device can be packaged conventionally, but the source inductance increases
Solution Approach 1:
The invention extracts and eliminates the bond-wire from the device structure by configuring the semiconductor substrate itself as the source electrode. The substrate contact serves dual purposes as both the mechanical support and the electrical connection, removing the need for separate bond-wire connections and thereby reducing source inductance while simplifying the packaging structure.
Solution Approach 2:
The substrate contact is designed to perform multiple functions simultaneously: it serves as the mechanical substrate support, the electrical source electrode, and the grounding reference. This multi-functionality eliminates the need for separate bond-wires and reduces the overall device complexity while achieving low source inductance.
2Device complexity
If the drain electrode is placed on the substrate, then the device structure is simplified, but the source inductance increases due to required bond-wires
Solution Approach 1:
The invention inverts the conventional configuration by placing the source electrode on the substrate contact instead of the drain electrode. This inversion allows the substrate to serve as the source electrode directly, eliminating the need for bond-wires and reducing source inductance, while the drain electrode is positioned on the opposite side of the device structure.
3Ease of manufacture
If lateral spacing is increased for top drain contact, then the device can be fabricated with planar gate, but the cell pitch increases
Solution Approach 1:
The invention transitions from a planar two-dimensional layout to a three-dimensional vertical structure. The drain electrode is positioned on the side or bottom of the device rather than on the top surface, allowing the gate to be formed with a smaller lateral pitch while maintaining ease of fabrication through vertical current flow paths.
4Reliability
If sinker region or trench is used to connect top source to P+ substrate, then the source can be connected to substrate, but the cell pitch increases due to dimensions occupied by sinker or trench
Solution Approach 1:
The invention extracts and eliminates the need for separate sinker regions or trenches by directly configuring the substrate contact as the source electrode. The substrate itself serves as the connection path, removing the additional lateral space required for sinker structures and reducing the cell pitch.
5Reliability
If deep resistive sinker is used to reduce source resistance, then the source connection is improved, but the fabrication process becomes more complex and costly
Solution Approach 1:
The highly doped P+ substrate serves as its own low-resistance connection path. The substrate's inherent high doping concentration provides the necessary low source resistance without requiring additional deep sinker structures or complex fabrication processes, achieving self-service functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves reduced source inductance, lower manufacturing costs, and improved reliability by minimizing on-resistance and latch-up possibilities, enabling adaptable designs for high and low voltage applications with a self-termination feature that simplifies the device structure.
Implementation Method 1
uses a conductive substrate with highly doped P+ substrate
Implementation Method 2
utilizing an integrated body-source short structure at the bottom of trenches surrounded by gate electrodes, eliminates the need for bond-wires and deep resistive sinkers, reducing source inductance and on-resistance
Data Source
AI summary
This invention discloses an inverted field-effect-transistor (iT-FET) semiconductor device that includes a source disposed on a bottom and a drain disposed on a top of a semiconductor substrate. The semiconductor power device further comprises a trench-sidewall gate placed on sidewalls at a lower portion of a vertical trench surrounded by a body region encompassing a source region with a low resistivity body-source structure connected to a bottom source electrode and a drain link region disposed on top of said body regions thus constituting a drift region. The drift region is operated with a floating potential said iT-FET device achieving a self-termination.