Power Switch Gate Driver With Inverter-Assisted Drive Boost
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Solution Overview
Problem
Conventional power switch driving circuits require a large layout area and increased product costs due to the use of four PMOS transistors in the latched comparator, which affects driving ability and efficiency.
Innovation Solution
A power switch driving circuit is designed with a first circuit controlling a PMOS transistor and a second circuit controlling an NMOS transistor, both coupled between a supply voltage and ground, with a driving enhancement circuit using a third transistor and inverter to improve driving ability, reducing layout area and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a latched comparator with four PMOS transistors is used to enhance driving ability, then the driving speed and control capability are improved, but the layout area increases and product costs increase
Solution Approach 1:
The driving circuit is segmented into three functional modules: a first circuit for driving the PMOS transistor, a second circuit for driving the NMOS transistor with opposite switching action, and a driving enhancement circuit with a third transistor and inverter. This segmentation allows each module to be optimized independently, reducing the overall layout area while maintaining driving capability.
Solution Approach 2:
The patent merges the driving functions of multiple transistors into a more compact configuration. By combining the control logic and driving functions into integrated circuits rather than using separate latched comparators, the layout area is reduced while the driving enhancement circuit maintains the necessary driving speed through the third transistor and inverter configuration.
2Ease of operation
If a latched comparator with four PMOS transistors is used to enhance driving ability, then the driving ability is improved, but the device complexity and product costs increase
Solution Approach 1:
The driving ability is maintained through functional segmentation where the first circuit controls the PMOS transistor, the second circuit controls the NMOS transistor with opposite switching action, and the driving enhancement circuit provides additional driving capability. This segmentation achieves the required driving ability with simpler, more modular circuits rather than a complex latched comparator.
Solution Approach 2:
The driving enhancement circuit with the third transistor and inverter serves multiple functions: it enhances the driving capability for the power switch while also providing proper voltage level conversion and signal inversion. This multi-functionality reduces the need for separate dedicated circuits, thereby reducing overall device complexity.
3Ease of operation
If conventional latched comparator design is used, then driving control is achieved, but the layout area and associated product costs are increased
Solution Approach 1:
The control capability is achieved by merging the control functions into integrated circuits that combine multiple functions (driving, enhancement, inversion) in a compact design. This reduces the number of discrete components and layout area required, thereby reducing manufacturing costs while maintaining full control capability over the power switch.
Data Source
AI summary
In one embodiment, a power switch driving circuit can include: (i) a first circuit configured receiving a control signal, and controlling a first transistor gate, where a first transistor source is coupled to a power supply, and a first transistor drain is coupled to a driving signal configured to control a power switch; (ii) a second circuit configured to receive the control signal, and to control a second transistor gate, where a second transistor source is coupled to ground, and a second transistor drain is coupled to the driving signal; and (iii) a driving enhancement circuit having a third transistor and a first inverter that is configured to invert an output of the first circuit to control a third transistor gate, where a third transistor source is coupled to the driving signal, and a third transistor drain is coupled to the power supply.