Inverter-Chain Pulse Generator With Reset-Limited Pulse Width
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Solution Overview
Problem
In writer pre-amplifier designs, using an inverter chain to generate overshoot pulse current signals can result in pulse width misalignment with the data duration at high data rates, leading to signal collapse, as the pulse width may exceed the data duration, causing the overshoot pulse current signal to lose alignment with the clock signal.
Innovation Solution
A method and apparatus that utilize an inverter chain to generate a delayed clock signal and a reset signal, where the pulse width of the output signal is adjusted to match the data duration when it exceeds the pulse width, ensuring alignment with the clock signal by incorporating reset circuitry to manage the pulse width based on the clock and delayed clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an inverter chain is used to generate overshoot pulse current signals, then simplicity and good signal integrity are achieved, but pulse width misalignment with data duration occurs at high data rates
Solution Approach 1:
The patent applies dynamics by making the pulse generation system adaptive to varying data rates. The inverter chain delay, which is inherently fixed, is compensated by dynamically adjusting the pulse width based on the actual data duration at different data rates. This allows the system to maintain proper alignment between overshoot pulses and data signals across varying operating conditions without changing the fundamental simple inverter chain structure.
Solution Approach 2:
The patent changes the pulse width parameter dynamically to match the data duration parameter. By monitoring the data rate and calculating the corresponding data duration, the system adjusts the pulse width parameter to ensure proper alignment. This parameter adjustment resolves the contradiction by allowing the simple inverter chain to produce correctly timed pulses despite its fixed delay characteristic.
2Duration of action of moving object
If the pulse width is set to be larger than the data duration, then sufficient overshoot coverage is achieved, but signal collapse occurs due to misalignment with clock signal
Solution Approach 1:
The patent implements feedback by monitoring the data duration and using this information to adjust the pulse width. The system continuously compares the generated pulse width with the actual data duration and makes corrections as needed. This feedback mechanism ensures that the pulse width remains appropriately sized to cover the data signal without causing misalignment and signal collapse.
Solution Approach 2:
The patent applies preliminary anti-action by preemptively adjusting the pulse width based on predicted data duration at different data rates. Before signal collapse can occur, the system calculates the appropriate pulse width and configures the pulse generator accordingly. This preventive approach eliminates the risk of misalignment by preparing the correct pulse parameters in advance.
3Duration of action of moving object
If inverter chain delay is increased to extend pulse width, then pulse coverage is improved, but alignment with clock signal is lost at high data rates
Solution Approach 1:
The patent makes the pulse width dynamic rather than fixed. Instead of increasing the inverter chain delay to extend pulse width, the system dynamically adjusts the pulse width parameter based on the actual data duration. This dynamic adjustment maintains both sufficient pulse coverage and precise timing alignment with the clock signal across varying data rates.
Solution Approach 2:
The patent changes the pulse width parameter to match the data duration parameter at different data rates. By adjusting this parameter dynamically, the system achieves both adequate pulse coverage and precise timing alignment without relying on fixed inverter chain delay extensions that would cause misalignment at high data rates.
Data Source
AI summary
In one embodiment, a method includes generating a first signal based on a clock signal and generating a second signal based on a programmable delayed clock signal. The method then generates a reset signal based on the first signal and the second signal. The clock signal is delayed using an inverter chain to generate a delayed version of the clock signal. An output signal is generated based on the delayed version of the clock signal and the reset signal. When a pulse width of the output signal is greater than a data duration determined from the clock signal, the pulse width of the output signal is reset to the pulse width of the data duration.