Inverter Dead-Time Insertion With Current-Direction Compensation
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Solution Overview
Problem
The insertion of dead-time intervals in gate drive signals for inverters in electric vehicle power converters leads to significant distortion in the output current, and existing compensation techniques have not been completely effective in reducing this distortion without additional hardware.
Innovation Solution
A controller adjusts the duty cycle and timing signals for the upper and lower switching devices based on the direction of current flow, generating offset duty cycles and timing signals to insert dead-time intervals while maintaining the total volt-seconds delivered by the active switching device, thereby reducing current distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dead-time intervals are inserted into gate drive signals to prevent shoot-through, then switching device safety is improved, but output current waveform distortion increases
Solution Approach 1:
The patent applies preliminary action by detecting the current direction before the dead-time interval occurs and pre-adjusting the duty cycle of the subsequent PWM signal. The controller determines whether current is flowing through the upper or lower switching device, then compensates for the volt-seconds loss that will occur during the upcoming dead-time by modifying the duty cycle in advance. This ensures that the total volt-seconds delivered to the load remains accurate despite the necessary dead-time intervals.
Solution Approach 2:
The patent employs feedback by continuously monitoring the current direction in each phase leg and using this information to dynamically adjust the duty cycle compensation. The controller receives current direction signals and uses them to determine the appropriate compensation amount for each PWM cycle, creating a closed-loop system that maintains accurate current control while accounting for dead-time effects.
2Reliability
If dead-time intervals are inserted to avoid shoot-through, then device protection is improved, but control delays are introduced
Solution Approach 1:
The patent applies preliminary action by calculating and preparing the compensated duty cycle values before the dead-time intervals occur. The controller determines the current direction and computes the necessary duty cycle adjustment in advance, so that when the PWM switching occurs, the compensation is already built into the control signal. This minimizes the effective control delay by performing the compensation calculation proactively rather than reactively.
3Reliability
If conventional dead-time insertion is used, then shoot-through is prevented, but additional hardware is required for effective compensation
Solution Approach 1:
The patent applies self-service by using the existing current direction detection capability already present in the inverter control system. The controller uses its existing microprocessor or digital signal processor to detect current direction and perform the duty cycle compensation calculations, without requiring external compensation circuits or additional hardware components. The system serves itself by utilizing its built-in computational resources to eliminate dead-time distortion.
Solution Approach 2:
The patent replaces what would traditionally be a hardware-based compensation mechanism with a software-based solution. Instead of using additional analog circuits or hardware compensators, the invention implements compensation through digital signal processing and conditional logic in the controller's firmware, substituting mechanical/electrical compensation hardware with software-based duty cycle adjustment.
Data Source
AI summary
An electric drive system of an electrified vehicle has a power converter with phase leg switching devices controlled by pulse-width modulation to supply multi-phase AC to an electric traction motor. Dead-time intervals are inserted into gate drive signals for the switching devices without introducing any significant distortion in the output of the converter. A direction of current flow between a phase leg and the motor is detected. When the current direction is positive, lower gate signals for a lower switching device in the phase leg have a delayed rising edge and an advanced falling edge while upper gate signals are unmodified. When the current direction is negative, upper gate signals for an upper switching device in the phase leg have a delayed rising edge and an advanced falling edge while lower gate signals are unmodified.