Inverter Delay Measurement for On-Chip Process Variation
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Solution Overview
Problem
Current methods for measuring process variation in semiconductor fabrication require external equipment and lengthy test times, making it costly and inconvenient, especially after IC assembly or in customer hands, and do not account for temperature and voltage effects on RF/analog and digital circuit performance.
Innovation Solution
A mechanism that directly measures process corner on an integrated circuit die using existing TDC circuitry, which measures inverter delay to determine transistor speed and process strength, allowing for internal compensation without additional equipment and enabling tracking of temperature and voltage effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external test equipment is used to measure process variation, then measurement capability is provided, but testing time and cost increase significantly
Solution Approach 1:
The patent implements self-service by embedding the process variation measurement functionality directly within the semiconductor device using existing TDC circuitry. The device measures its own process corner characteristics through internal inverter delay measurements, eliminating the need for external test equipment and reducing test time while maintaining measurement capability.
Solution Approach 2:
The patent applies multi-functionality by making the existing TDC circuitry serve dual purposes: its original function for time delay measurement and a new function for process variation measurement. By measuring inverter delay through the same TDC infrastructure, the system achieves process corner detection without requiring dedicated measurement hardware, thereby reducing both cost and test time.
2Measurement precision
If external test equipment is used to measure process variation, then measurement capability is provided, but manufacturing cost increases
Solution Approach 1:
The device performs self-measurement of process corner using embedded TDC circuitry, eliminating the need for costly external test equipment. The measurement is achieved through internal inverter delay characterization, making the manufacturing process more cost-effective while maintaining measurement precision.
Solution Approach 2:
The existing TDC circuitry is utilized for dual purposes: original time delay measurement and new process variation measurement. This multi-functionality eliminates the need for separate measurement equipment, reducing manufacturing costs while preserving measurement capability.
3Loss of information
If indirect measurement methods are used to infer process variation, then process information is obtained, but additional equipment and test steps are required
Solution Approach 1:
The system directly measures process variation information through embedded TDC circuitry without requiring external test equipment. By measuring inverter delay internally, the device obtains process corner information directly, eliminating the need for indirect measurement methods and reducing test complexity.
4Productivity
If inverter delay measurement is implemented using existing TDC circuitry, then measurement cost and time are reduced, but the mechanism must be integrated into existing circuit design
Solution Approach 1:
The patent achieves high testing efficiency by making the existing TDC circuitry perform dual functions: original time delay measurement and process variation measurement. This integration approach reduces productivity loss by eliminating separate measurement infrastructure while the multi-functionality handles the integration complexity within the existing design framework.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables direct, cost-effective measurement of process variation, allowing for real-time compensation of RF/analog performance across the lifecycle of the chip, reducing testing time and costs while improving silicon performance by adjusting settings based on measured process strength.
Implementation Method 1
measuring a time delay of an inverter fabricated on the integrated circuit and determining a measure of process strength as a function of the measured time delay
Data Source
AI summary
A novel method and apparatus for defining process variation in a digital RF processor (DRP). The invention is well suited for use in highly integrated system on a chip (SoC) radio solutions that incorporate a very large amount of digital logic circuitry. The method and apparatus provide direct measurement of fabrication process variation in circuits without requiring any additional test equipment by utilizing a time to digital converter (TDC) circuit already present in the chip. The TDC circuit relies on the time delay in an inverter chain to sample a high speed CKV clock using a slow FREF clock. Calculation of inverse time provides a direct correlation for fabrication process variation in each die.