Microcontroller Delayed Protection for Three-Level Inverter Faults
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Solution Overview
Problem
Three-level inverters require complex fault protection sequences due to their specific shutdown and recovery needs, which existing software methods fail to provide in real-time, and hardware solutions like FPGAs increase system cost and development effort.
Innovation Solution
A microcontroller unit with Enhanced Pulse Width Modulation (EPWM) modules and an auxiliary EPWM module is used to receive a trip signal and produce a delayed trip signal, controlling power switches in a three-level inverter to implement the necessary shutdown and recovery sequences, reducing the need for external hardware circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external hardware circuits like FPGAs or CPLDs are used to provide delayed protection, then real-time fault protection is achieved, but system cost and development effort increase
Solution Approach 1:
The patent merges the delayed protection functionality into the microcontroller unit by integrating an auxiliary EPWM module that can generate delayed trip signals. This combines the fault detection, delay timing, and power switch control functions into a single integrated controller, eliminating the need for separate external hardware circuits like FPGAs or CPLDs, thereby reducing system cost and development effort while maintaining real-time protection capability
Solution Approach 2:
The auxiliary EPWM module within the microcontroller unit serves multiple functions: it receives trip signals from fault detection modules, generates delayed trip signals for selective power switch shutdown, and coordinates with main EPWM modules for comprehensive inverter control. This multi-functional design eliminates the need for dedicated external protection hardware, reducing system complexity and cost
2Device complexity
If software methods are used for fault protection, then system cost is reduced, but real-time protection capability is lost
Solution Approach 1:
The auxiliary EPWM module acts as an intermediary between the fault detection module and the main EPWM modules. It receives trip signals and generates delayed trip signals that are sent to specific EPWM modules, enabling precise timing control for selective power switch shutdown. This hardware-mediated approach within the integrated microcontroller provides real-time response capability while keeping the system cost-effective
Solution Approach 2:
The patent replaces traditional software-based protection sequences with hardware-based EPWM module control. The auxiliary EPWM module uses hardware timing mechanisms to generate delayed trip signals, substituting software delay routines with dedicated hardware timing circuits. This substitution enables real-time protection response while maintaining affordable system costs through integrated microcontroller implementation
Data Source
AI summary
A microcontroller unit for controlling a three-level inverter including delayed fault protection is provided. The microcontroller unit includes an input port configured to receive a trip signal from a fault detection module, and a plurality of EPWM modules, each configured to control a power switch within the three-level inverter. The microcontroller unit includes an auxiliary EPWM module configured to receive the trip signal and produce a delayed trip signal, and processing circuitry coupled with the input port, the plurality of EPWM modules, and the auxiliary EPWM module. The processing circuitry is configured to, in response to activation of the trip signal, direct one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the trip signal, and to direct a different one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the delayed trip signal.