Planar Inverter Gap Sizing for Low-Inductance eVTOL Cooling
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Solution Overview
Problem
Aerospace applications require more efficient and lightweight power electronics converters to improve aircraft performance and mission range, but existing power module topologies are limited by high parasitic inductance, which increases heat generation and reduces efficiency.
Innovation Solution
The design includes a power electronics converter with a commutation cell featuring reduced parasitic inductance, achieved through a multi-layer planar carrier substrate and optimized electrical connections, allowing for higher operating voltages, frequencies, and heat removal efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power module topology is used with conventional electrical connections, then device complexity is reduced and ease of manufacture is improved, but parasitic inductance increases leading to reduced efficiency and increased heat generation
Solution Approach 1:
The patent transitions from conventional three-dimensional electrical connections to a planar two-dimensional arrangement on a multi-layer substrate. Power semiconductor devices are mounted on a carrier substrate with electrical connections routed through multiple layers in a planar configuration, reducing the height dimension and associated parasitic inductance while maintaining electrical functionality.
Solution Approach 2:
The electrical connection system is segmented into multiple independent conductive layers on the substrate, allowing optimized current paths for different signals. Power and ground connections are separated into distinct layers, reducing mutual interference and parasitic inductance in each path.
2Reliability
If power module topology is used, then availability and cost-effectiveness are improved, but weight increases reducing power-to-weight ratio
Solution Approach 1:
The carrier substrate integrates multiple functions into a single component: electrical connections, mechanical support for power devices, and thermal conduction path to the heat sink. This consolidation eliminates separate mounting structures and reduces overall converter weight while maintaining reliability.
Solution Approach 2:
The carrier substrate uses composite material structures combining electrically conductive layers for power transmission with thermally conductive properties for heat removal. This dual-function material reduces the need for separate thermal management components, lowering weight.
3Reliability
If larger substrate-to-heat-sink gap is used, then electrical insulation is improved, but thermal conduction efficiency decreases
Solution Approach 1:
The substrate-to-heat-sink gap is optimized to a specific range (0.5mm to 2.0mm) that balances electrical insulation requirements with thermal conduction efficiency. This parameter optimization allows adequate voltage clearance while maintaining effective heat transfer through the gap.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances efficiency to over 99% and reduces weight, improving power density and heat management in power electronics converters for aerospace applications.
Implementation Method 1
a thermal interface layer (TIL) between a heat removal side of the prepackage and the heat sink
Implementation Method 2
The heat sink may be spaced apart in the z-direction from the multi-layer planar carrier substrate so as to define a gap between the heat sink and the multi-layer planar carrier substrate
Data Source
AI summary
An electrical vertical takeoff and landing (eVTOL) aircraft includes an electrical propulsion unit that has a propeller or a fan configured to be driven to rotate by an electric motor arranged to receive electrical power from an inverter. The inverter includes a carrier substrate, and a converter commutation cell including a power circuit. The power circuit includes at least one power semiconductor switching element. Each power semiconductor switching element is comprised in a power semiconductor prepackage. A heat sink is arranged to remove heat from the respective power semiconductor prepackage. The heat sink is spaced apart from the carrier substrate to define a heat sink gap between the carrier substrate and the heat sink. A converter parameter φ, which is defined as a size of the heat sink gap divided by a maximum electric field strength in the heat sink gap, is less than or equal to 20 nm2/V.


