Inverter Driving Circuit Phase Adjusting Mechanism
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Solution Overview
Problem
Existing inverter driving circuits face challenges in adjusting delay times for rising and falling signals, leading to significant phase differences between input and output, which degrades the control performance of PWM control systems.
Innovation Solution
An inverter driving circuit with a phase adjusting circuit that includes a constant current source, capacitor, and reference voltage source, where the delay time of the input signal is adjusted by comparing the reference voltage with the voltage generated by the capacitor, allowing for equalization of delay times between signal start and switching element activation/deactivation, thereby matching input and output pulse widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional driver circuit is used without phase adjustment, then the circuit structure is simple, but the pulse width controllability is poor due to significant phase differences between input and output signals
Solution Approach 1:
The phase adjusting circuit is divided into separate functional modules: a delay time adjusting circuit that independently controls the rise time delay, and a fall time adjusting circuit that independently controls the fall time delay. This segmentation allows precise adjustment of each phase component separately, improving pulse width controllability while keeping each module relatively simple in structure.
Solution Approach 2:
The phase adjusting circuit performs preliminary delay adjustment on the drive signal before it reaches the switching element. By pre-adjusting the rise and fall times in the phase adjusting circuit, the system compensates for subsequent delays in the driver circuit and switching element, ensuring accurate pulse width control at the output.
2Productivity
If delay time adjustment is not implemented, then the circuit operation is simple, but the control performance of PWM control system is degraded due to phase differences
Solution Approach 1:
The phase adjusting circuit uses feedback mechanisms where the adjusted drive signal characteristics are monitored and used to fine-tune the delay parameters. The circuit adjusts rise and fall times based on the actual phase difference between input control signals and output switching signals, creating a closed-loop control system that optimizes PWM performance.
Solution Approach 2:
The system dynamically adjusts the delay time parameters of the drive signal by changing the rise time and fall time parameters in the phase adjusting circuit. This parameter adjustment compensates for fixed delays in the driver circuit and switching elements, improving overall control performance without requiring complex circuit reconfiguration.
3Manufacturing precision
If rise and fall delay times are not equalized, then the circuit operation is straightforward, but the input and output pulse widths differ significantly
Solution Approach 1:
The phase adjusting circuit employs asymmetric adjustment mechanisms where the rise time delay and fall time delay are adjusted independently through separate control circuits. This asymmetric design allows the system to compensate for the inherently asymmetric delay characteristics of the switching element, achieving matched input and output pulse widths by applying different delay corrections to each transition.
Solution Approach 2:
The delay time parameters in the phase adjusting circuit are made dynamic rather than fixed. The circuit can adjust the rise and fall delays in real-time based on operating conditions, allowing optimal pulse width matching across different PWM duty cycles and frequencies. This dynamic adjustment capability ensures consistent performance despite varying operational requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves the controllability of pulse widths, enhancing the control performance of PWM control systems by ensuring equal delay times for signal rising and falling phases, thus reducing phase differences and improving overall system efficiency.
Implementation Method 1
a phase adjusting circuit which delays at least either rise or fall of the input signal... including a constant current source, capacitor, and reference voltage source
Implementation Method 2
the delay time of the input signal is adjusted by comparing the reference voltage with the voltage generated by the capacitor
Data Source
AI summary
A phase adjusting circuit is provided that is capable of adjusting a delay time at a rise or fall of a driving signal for driving an inverter. A phase adjusting circuit is provided upstream of a driver circuit, and an output from a hysteresis comparator is input to the driver circuit through the phase adjusting circuit. The phase adjusting circuit delays at least either rise or fall of the signal input to the driver circuit to adjust any difference between the pulse width of the input signal input to the driver circuit and the pulse width of a signal output from a switching element of an inverter driven by the driver circuit.