Inverter Phase Leg Layout for Shoot-Through Avoidance
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Solution Overview
Problem
In inverter drive systems for electrified vehicles, high common source inductance can reduce switching time and energy loss but increases the risk of shoot-through conditions due to potential gate voltage overshoot, which existing designs struggle to manage effectively.
Innovation Solution
The configuration of phase legs with anti-parallel diodes positioned to bypass commutation currents away from common source inductances, ensuring that the majority of power loop inductance is parallel to the diodes, thereby avoiding increased gate voltage induced by commutation currents during switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If common source inductance is increased to reduce switching time and energy loss, then switching efficiency is improved, but the risk of shoot-through conditions increases due to gate voltage overshoot
Solution Approach 1:
The patent segments the gate loop and power loop into separate physical paths. The gate loop is routed through a gate resistor RG to the gate terminal, while the power loop flows through the common source inductance Lcs to the source terminal. This spatial segmentation prevents commutation currents from coupling into the gate loop, eliminating gate voltage overshoot while preserving the beneficial common source inductance for reduced switching losses.
Solution Approach 2:
The gate resistor RG acts as an intermediary element that isolates the gate terminal from commutation current effects. By placing the gate resistor in series with the gate terminal and routing the gate loop separately from the power loop, the resistor serves as a barrier that prevents voltage spikes generated by Lcs during commutation from reaching the gate, thus preventing shoot-through while allowing Lcs to maintain its switching performance benefits.
2Speed
If common source inductance is increased to speed up switching transitions, then switching speed is improved, but gate voltage overshoot increases causing potential shoot-through
Solution Approach 1:
The patent segments the gate loop and power loop into separate physical paths. The gate loop is routed through a gate resistor RG to the gate terminal, while the power loop flows through the common source inductance Lcs to the source terminal. This spatial segmentation prevents commutation currents from coupling into the gate loop, eliminating gate voltage overshoot while preserving the beneficial common source inductance for reduced switching losses.
Solution Approach 2:
The gate resistor RG acts as an intermediary element that isolates the gate terminal from commutation current effects. By placing the gate resistor in series with the gate terminal and routing the gate loop separately from the power loop, the resistor serves as a barrier that prevents voltage spikes generated by Lcs during commutation from reaching the gate, thus preventing shoot-through while allowing Lcs to maintain its switching performance benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for increased common source inductance without risking shoot-through, maintaining reduced switching energy loss while preventing gate voltage overshoot, thus enhancing switching efficiency and reliability.
Implementation Method 1
A current in the output (power loop) portion of the common source inductance modifies the gate voltage in a manner that reinforces (e.g., speeds up) the switching performance
Data Source
AI summary
A phase leg in an inverter bridge has an upper transistor with upper gate, collector, and emitter terminals, wherein the upper gate and emitter terminals are arranged to create an upper common source inductance. A lower transistor has lower gate, collector, and emitter terminals, wherein the lower gate and emitter terminals are arranged to create a lower common source inductance. An upper diode is coupled across the upper collector and emitter terminals and substantially in parallel with the upper common source inductance. A lower diode is coupled across the lower collector and emitter terminals and substantially in parallel with the lower common source inductance. Thus, the diodes substantially bypass the common source inductances when carrying commutation current when one of the transistors is switching off. This allows the phase leg to possess significant common source inductance at the gate terminals while avoiding “shoot-through” issues.


