Three-Phase Inverter Phase Synchronization and Zero Voltage Switching
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Solution Overview
Problem
Existing three-phase, three-level inverters face issues with desynchronized operation, high switching frequency variation, and limited modulation index due to the lack of phase synchronization and sinusoidal input currents, leading to increased common mode voltage and harmonic distortion.
Innovation Solution
A control algorithm for a three-phase, N-level inverter that uses a current controller to output gating signals for zero voltage switching, maintaining synchronization across phases and reducing common mode voltage by connecting inductors to the positive, negative, and mid-point of the DC bus in a specific sequence, allowing operation in discontinuous and triangular current modes while minimizing switching frequency variation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If TCM control is implemented with DC mid-point connected to neutral, then ZVS turn-on is achieved, but phase synchronization is lost and switching frequency varies highly
Solution Approach 1:
The patent segments the three-phase inverter operation into twelve distinct sectors, each with specific switching sequences. This segmentation allows independent control of each phase while maintaining overall synchronization, resolving the contradiction between achieving ZVS and maintaining phase synchronization.
Solution Approach 2:
The patent dynamically adjusts switching sequences and sector assignments based on real-time operating conditions. By making the control strategy adaptive and dynamic rather than fixed, the system can achieve ZVS turn-on while maintaining stable phase synchronization across varying load and voltage conditions.
2Ease of manufacture
If independent single-phase operation is used, then implementation is simpler, but switching frequency variation increases and modulation index is limited
Solution Approach 1:
The patent creates a universal control algorithm that handles all three phases through a unified twelve-sector switching strategy. This multi-functional approach allows the same control logic to manage phase synchronization, ZVS achievement, and modulation index optimization simultaneously, increasing adaptability while maintaining implementation simplicity.
3Object-generated harmful factors
If switching frequency is increased to reduce harmonic distortion, then current quality improves, but switching losses increase
Solution Approach 1:
The patent changes the switching strategy by implementing zero-voltage switching through carefully timed sector transitions and switch sequencing. This parameter change in the switching method allows operation at lower frequencies while maintaining low harmonic distortion, thus reducing switching losses without sacrificing current quality.
4Loss of energy
If ZVS is achieved by driving current to negative value, then turn-on losses are eliminated, but common mode voltage increases
Solution Approach 1:
The patent incorporates feedback mechanisms that monitor current direction, voltage levels, and sector position to dynamically adjust switching sequences. This feedback control ensures ZVS is achieved while actively managing common mode voltage through real-time switching sequence optimization, resolving the contradiction between turn-on loss elimination and common mode voltage reduction.
Data Source
AI summary
A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.