Invertible Parity Logic for Nonlinear Avalanche Encoding
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Solution Overview
Problem
Conventional invertible functions implementation systems lack scalability and logical simplicity, particularly in implementing avalanche effect and nonlinearity, especially for smaller block sizes, making them vulnerable to attacks and lacking robustness in modern quantum computing and high computational power scenarios.
Innovation Solution
The implementation of invertible parity functions using parity logic, which involves encoding and decoding processes through XOR or XNOR operations, allowing for dynamic or constant parity function variable limits, and iterative encoding with permutation and substitution boxes, to achieve non-linearity and higher dependency between encoded and input bits without overhead bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional invertible functions are used for data encryption, then basic encryption functionality is achieved, but scalability and robustness against quantum computing attacks are insufficient
Solution Approach 1:
The patent implements dynamic parity function variable limits that can be adjusted based on block size and security requirements. The system transitions from static conventional functions to dynamic functions that adapt to different computational scenarios, including quantum computing threats, thereby improving both reliability and scalability simultaneously
Solution Approach 2:
The patent changes key parameters of the encryption function including parity function variable limits, block sizes, and the use of permutation-substitution networks with varying degrees of nonlinearity. These parameter changes enable the system to scale across different security requirements and computational environments while maintaining robustness
2Reliability
If conventional encryption methods are used, then basic security is provided, but avalanche effect and nonlinearity implementation is insufficient
Solution Approach 1:
The patent segments the encryption process into distinct modules: initial parity function application, permutation network stages, substitution box operations, and final inversion. Each segment contributes specifically to avalanche effect and nonlinearity while maintaining overall logical simplicity through clear functional separation
Solution Approach 2:
The patent introduces intermediary components including permutation networks and substitution boxes that mediate between the input data and final encrypted output. These intermediaries enhance avalanche effect and nonlinearity while preserving the simplicity of the overall structure through well-defined intermediate transformation stages
3Ease of operation
If overhead bits are added to achieve invertibility, then decoding capability is improved, but encoding efficiency deteriorates
Solution Approach 1:
The patent implements self-service mechanisms where the parity bits generated during encoding inherently contain the information needed for decoding. The invertible parity function with carefully selected variable limits enables the encoded data to serve its own decoding requirements without requiring additional overhead bits, thereby maintaining encoding efficiency while ensuring decoding capability
Data Source
AI summary
Parity logic is widely used in forward error correction codes and error detection codes. When used for error correction and error detection applications, the role of parity bits is to increase code distance by introducing memory between encoded bits and input bits at cost of overhead bits. Present disclosure provide systems and methods for implementing invertible parity functions using parity logic wherein ‘k’ input bits are received and encoded using a first invertible parity function. The ‘k’ input bits can be iteratively encoded to obtain nonlinearity and higher dependency between set of encoded parity bits and the ‘k’ input bits or other data bits. Further the decoding is performed on the set of encoded bits to retrieve original ‘k’ input bits using a second invertible parity function.

