Inverting-Stage Voltage Droop Detection for High-Frequency ICs
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Solution Overview
Problem
Integrated circuit (IC) devices experience voltage droops during current spikes, leading to timing violations and erroneous operations due to insufficient power supply adjustment, which existing detection methods fail to reliably detect at higher frequencies.
Innovation Solution
A voltage droop detection circuit using a domino chain of inverting stages with separate P-type and N-type transistors, initialized by precharge and discharge signals, and monitored by flip-flops to detect voltage drops through propagation delay analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a chain of buffers is used to detect voltage droop through propagation delay, then the detection method can identify voltage drops, but the switching speed becomes insufficient for IC devices operating at higher frequencies
Solution Approach 1:
The patent divides the detection chain into multiple inverting stages (first inverting stage, second inverting stage, etc.) connected in sequence. Each stage processes the signal independently, allowing the system to achieve fine-grained measurement of propagation delay while maintaining fast switching through modular architecture. This segmentation enables detection resolution suitable for high-frequency operation.
Solution Approach 2:
The patent employs inverting stages instead of non-inverting buffers. The inverting stages use complementary PMOS and NMOS transistors that switch states based on the input signal, creating a faster switching mechanism. The inversion operation inherently provides sharper transitions and reduced propagation delay compared to standard buffer chains, directly addressing the speed limitation at higher frequencies.
2Productivity
If the power supply cannot adjust voltage quickly enough during current spikes, then the IC device maintains simplicity in power supply design, but timing violations and erroneous operations occur
Solution Approach 1:
The patent implements a voltage droop detection circuit that proactively monitors the supply voltage before timing violations can occur. By continuously measuring propagation delay through the inverting stages and comparing it against expected values, the system detects voltage drops in advance and can trigger corrective actions (such as frequency adjustment or error signaling) before they cause timing violations or data corruption, thus maintaining reliability at high operating frequencies.
Data Source
AI summary
A voltage droop detection circuit can be used to detect a voltage droop in an integrated circuit (IC) device. The voltage droop detection circuit may include a chain of inverting stages, and each inverting stage may include a P-type transistor and an N-type transistor. The chain of inverting stages can be initialized to alternating logic states during an initialization phase of a clock cycle, and an evaluation pulse can be inputted into the chain of inverting stages during an evaluation phase of the clock cycle. A voltage droop may be detected if a number of inverting stages that are able to switch output logic states from their respective initialized logic states is smaller than a nominal value indicating a number of inverting stages that are able to switch their respective output logic states under normal voltage condition.