I/O Accelerator Private Device Discovery for Virtual Storage
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Solution Overview
Problem
Conventional virtualized information handling systems face performance limitations when accessing storage resources due to low data throughput and high latency in the hypervisor driver stack, especially when communicating with applications executing on neighboring virtual machines.
Innovation Solution
An I/O accelerator device is used, programmed by a storage virtual appliance, to provide managed access to local and remote storage resources, utilizing direct memory access (DMA) for storage operations, and is configured to discover and map private devices as managed devices, abstracting them as virtual memory addresses to the operating system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional hypervisor driver stack is used for storage operations, then system compatibility and ease of operation are maintained, but data throughput is limited and latency is high
Solution Approach 1:
The patent introduces a private device coupled to the I/O accelerator that acts as an intermediary between the hypervisor driver stack and storage resources. This private device handles discovery, enumeration, and memory mapping of storage devices, bypassing the performance limitations of the conventional hypervisor driver stack while maintaining system compatibility. The I/O accelerator with its private device serves as a mediator that enables high-performance storage operations without requiring changes to the existing hypervisor architecture.
2Productivity
If I/O accelerator with private device discovery is implemented, then data throughput and storage access performance are improved, but device complexity and discovery mechanisms are increased
Solution Approach 1:
The I/O accelerator is configured with self-service capabilities to automatically discover, enumerate, and map private devices. The device performs autonomous discovery of coupled storage devices, automatically enumerates them as managed devices, and configures memory mappings without requiring manual intervention or complex external discovery mechanisms. This self-service approach handles the increased complexity internally while presenting a simplified interface to the operating system.
Solution Approach 2:
The system performs preliminary discovery and enumeration actions during device initialization. The I/O accelerator discovers and enumerates private devices before the operating system needs to access them, pre-configuring memory mappings and device relationships. This preliminary action ensures that when storage operations are initiated, the performance benefits are immediately available without runtime discovery overhead.
3Productivity
If direct memory access DMA is used for storage operations, then data throughput is improved and processor workload is reduced, but memory management complexity is increased
Solution Approach 1:
The private device coupled to the I/O accelerator serves as an intermediary that manages memory mapping complexity. It handles the configuration of DMA memory mappings between the I/O accelerator, private device, and storage resources, abstracting the complex memory management details from the operating system and applications. This intermediary approach enables efficient DMA operations while keeping memory management complexity contained within the I/O accelerator subsystem.
Data Source
AI summary
In accordance with embodiments of the present disclosure, an information handling system may include a processor subsystem having access to a memory subsystem and a device communicatively coupled to the processor subsystem, the device having an endpoint assigned for access by an operating system executing on the processor subsystem such that the endpoint appears to the operating system as a logical hardware adapter, wherein the device is configured to discover a private device coupled to the device, enumerate the private device as a managed device of the device, and map a portion of a virtual address space of an operating system executing on the processor subsystem to the private device, such that the private device is abstracted to the operating system as a virtual memory address of the operating system.


