I/O Access Control Apparatus for Memory Protection
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Solution Overview
Problem
In high-definition image processing systems, unauthorized access to memory by external devices can impair performance stability due to direct designation of physical addresses by I/O devices, leading to potential malfunctions and performance issues.
Innovation Solution
An I/O access control apparatus that receives commands with address and ID information, uses an access permission/denial table to determine valid access, and translates logical addresses to physical addresses, ensuring secure memory access through abstracted addresses and independent ID management for each access entity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If I/O devices directly designate physical addresses to control memory, then data access speed is improved, but memory protection and performance stability deteriorate
Solution Approach 1:
The patent introduces an intermediary access control apparatus between I/O devices and memory. This apparatus receives physical address designations from I/O devices, translates them to logical addresses, and mediates access through permission tables. The intermediary layer maintains fast data access while preventing unauthorized direct memory access by I/O devices, thus resolving the contradiction between speed and reliability.
2Productivity
If physical addresses are directly specified by external devices, then access efficiency is improved, but memory security and isolation deteriorate
Solution Approach 1:
The patent segments the address space into physical addresses (used by I/O devices) and logical addresses (used by the access control apparatus). It also segments memory access rights by creating separate permission tables for different I/O devices. This segmentation allows each component to operate efficiently within its own address space while maintaining security through controlled translation and permission checking, resolving the contradiction between access efficiency and memory security.
3Reliability
If independent address space is implemented for each access requesting entity, then memory protection is improved, but device complexity increases
Solution Approach 1:
The access control apparatus performs multiple functions: receiving physical address designations, translating to logical addresses, checking permission tables, and controlling memory access. By consolidating these functions into a single universal apparatus rather than separate control mechanisms for each I/O device, the patent achieves comprehensive memory protection while minimizing the complexity increase. The universal design allows the same apparatus to serve all I/O devices with different access requirements.
Data Source
AI summary
A command receiver receives, from an external access requesting entity, a command with which to access data, together with an address to be accessed and IOID to identify the access requesting entity. Based on the IOID, the access decision unit determines whether or not an access is one that is to be permitted for an access requesting entity to access a region of access destination. The access decision unit determines whether access of the access requesting entity is permitted or not, for each page that serves as the basic management unit of logical address in the processor space.