I/O Adapter Memory Region Allocation for Error Domain Isolation

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Solution Overview

Problem

Current memory-mapped I/O operations in computer systems can lead to processing delays due to the halting of all transactions when an error is detected in a single operation, affecting all physical functions associated with memory-mapped I/O regions, as error domains are not isolated.

Innovation Solution

The method involves pre-allocating and mapping memory regions to physical functions on an I/O adapter before booting, allowing for isolated error domains, where only the affected memory-mapped I/O operations are halted, while others remain unaffected, using hardware page table entries and a hypervisor to manage and associate these regions with partitionable endpoints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If memory-mapped I/O operations use a unified error domain for all physical functions, then system simplicity is maintained, but an error in a single operation halts all transactions causing processing delays

Engineering Contradiction:
Improveerror domain structureVSAvoidtransaction processing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the unified error domain into separate error domains for each physical function. Each physical function (PF) has its own isolated error domain, allowing errors to be contained within individual PFs rather than affecting all PFs. This segmentation enables selective halting of only the affected PF's transactions while other PFs continue operating, thus resolving the contradiction between system simplicity and productivity.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If memory regions are allocated after physical function addresses are known, then address association is straightforward, but memory allocation delays occur during system initialization

Engineering Contradiction:
Improvememory allocation processVSAvoidsystem initialization time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent performs memory region allocation before physical function addresses are known during system initialization. The hypervisor pre-allocates memory regions and creates placeholder entries in the I/O memory map, which are then associated with physical function addresses once they become available. This preliminary action eliminates allocation delays during initialization while ensuring correct address association, resolving the contradiction between ease of manufacture and time loss.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8825981B2Allocating addressable memory regions to an adapter
Publication Date: 2014.09.02 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8825981B2 patent drawing
  • US8825981B2 patent drawing
  • US8825981B2 patent drawing

AI summary

A method of configuring system memory may include determining a plurality of memory regions supportable on an input/output adapter. The input/output adapter may include a physical function. A memory region of the plurality of memory regions may be allocated to the physical function when an address of the physical function is unknown. The method may further include determining the address of the physical function and associating the address of the physical function with the memory region.