I/O Buffer Impedance Switching for Drive and Split Termination
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed signal integrity issues arise in chip-to-chip interconnects due to transmission line effects like reflections, attenuation, and cross-talk, particularly in SDRAM memory systems, where existing solutions lack dynamic impedance control and often require external resistors, increasing cost and power consumption.
Innovation Solution
A combined drive and termination circuit with variable impedance pull-up and pull-down networks, dynamically configurable between drive and termination modes, using transistors in parallel to adjust impedance, and a calibration mechanism to set optimal transistor enablement for different operating conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed external resistors are used for termination, then signal integrity is improved, but device complexity and cost increase
Solution Approach 1:
The patent combines the drive function and termination function into a single integrated circuit block. The termination resistors are integrated on-chip rather than using external discrete components, merging multiple functions into one unified structure that reduces overall system complexity while maintaining signal integrity.
Solution Approach 2:
The I/O buffer circuit is designed to perform multiple functions: it provides both drive capability and termination capability through integrated resistive elements. This multi-functional design eliminates the need for separate external termination resistors, reducing device complexity while maintaining reliable signal integrity.
2Reliability
If fixed external resistors are used for termination, then signal reflections are reduced, but power consumption increases
Solution Approach 1:
The patent implements dynamically controllable termination resistors that can be enabled or disabled based on operating conditions. This dynamic control allows the termination function to be activated only when needed, reducing unnecessary power consumption while still effectively controlling signal reflections during high-speed operations.
3Strength
If I/O buffers have low output impedance, then signal swing is improved, but signal reflections increase
Solution Approach 1:
The patent introduces integrated termination resistors as intermediary elements between the low-impedance I/O buffer and the transmission line. These resistors act as mediators that absorb reflections generated by the low-impedance buffer, allowing the buffer to maintain strong signal swing capability while the termination resistors prevent harmful reflections from propagating.
4Reliability
If separate drive and termination circuits are used, then function reliability is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges separate drive and termination circuits into a single integrated I/O buffer structure. By combining these functions into one unified circuit block with integrated resistive elements, the design maintains functional reliability while significantly reducing manufacturing complexity and cost compared to using separate discrete circuits.
Data Source
AI summary
A system and method of performing off chip drive (OCD) and on-die termination (ODT) are provided. A common pull-up network composed of transistors and a common pull-down network composed of transistors are employed to implement both of these functions. In drive mode, the pull-up network is configured to produce a calibrated drive impedance when an “on” output is to be generated, and the pull-up network is configured to produce a calibrated drive impedance when an “off” output is to be generated. In termination mode, the pull-up network and the pull-down network are configured to produce a calibrated pull-up resistance and pull-down resistance respectively such that together, they form a split termination.