IO Buffer Pad Tracking Circuitry for Multi-Voltage Fail-Safe Operation

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Solution Overview

Problem

Existing computing architectures face challenges in implementing fail-safe and tolerant operations for input-output (IO) buffer pad circuits, particularly in managing voltage variations across different domains (3.3V, 2.5V, 1.8V) to ensure safe and reliable operation during power sequence changes.

Innovation Solution

The implementation of IO buffer pad tracking schemes and techniques that utilize low-voltage devices, such as 1.8V devices, to provide power sequence independent fail-safe and tolerant support, incorporating multi-stage circuitry with gate, mode, and Nwell tracking circuits to manage voltage levels and ensure safe operation across various voltage domains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional IO buffer pad circuits are used without tracking schemes, then the circuit structure is simple, but the circuit cannot ensure safe operation during power sequence changes and voltage variations across different domains

Engineering Contradiction:
Improvesafe operation during power sequence changesVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The tracking circuitry proactively monitors voltage levels on the pad before power failures or overdrive conditions occur. By detecting voltage variations in advance and adjusting transistor gate voltages preemptively, the circuit maintains safe operating states without requiring complex reactive protection mechanisms, thus improving reliability while controlling complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit employs feedback mechanisms where the tracking circuitry continuously monitors pad voltage levels and uses this information to adjust the operation of output transistors. This closed-loop control ensures that the IO buffer pad remains in safe states during power sequence changes and voltage variations, achieving high reliability without excessive complexity through intelligent voltage tracking and adjustment

Inventive Principle:
Principle #23Feedback

2Reliability

If multi-stage circuitry with gate, mode, and Nwell tracking circuits is implemented, then fail-safe and tolerant support is achieved, but the device complexity increases

Engineering Contradiction:
Improvefail-safe and tolerant supportVSAvoidmulti-stage circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The tracking system is divided into specialized functional blocks: gate tracking circuitry for monitoring gate voltages, mode tracking circuitry for detecting operational modes, and Nwell tracking circuitry for monitoring substrate potentials. Each segment focuses on a specific aspect of voltage monitoring, allowing the system to achieve comprehensive fail-safe support while managing complexity through functional decomposition and specialized optimization of each tracking module

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The tracking circuitry is designed to handle multiple failure modes and voltage domain scenarios using a unified architecture. The same tracking infrastructure supports both fail-safe operation (preventing damage during power failures) and tolerant operation (maintaining functionality during overdrive conditions), reducing overall system complexity by avoiding separate dedicated circuits for each protection scenario

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If voltage tracking is implemented across multiple voltage domains (3.3V, 2.5V, 1.8V), then multi-voltage domain support is achieved, but the circuit complexity and power management overhead increase

Engineering Contradiction:
Improvemulti-voltage domain supportVSAvoidpower management overhead
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The tracking circuitry dynamically adapts its operation based on the detected voltage domain and power sequence. The circuit automatically adjusts its monitoring thresholds and transistor control voltages according to whether it is operating in 3.3V, 2.5V, or 1.8V domains, enabling versatile multi-voltage support while managing complexity through adaptive behavior rather than static complex circuitry for each voltage level

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11955970B2Input-output buffer tracking circuitry
Publication Date: 2024.04.09 ARM LTD
  • US11955970B2 patent drawing
  • US11955970B2 patent drawing
  • US11955970B2 patent drawing

AI summary

Various implementations described herein are directed to a device having an input-output pad configured to receive and supply an input-output pad voltage. The device may include gate tracking circuitry that receives a first voltage, receives a second voltage different than the first voltage, receives node voltages and provides a first tracking voltage and a second tracking voltage based on the first voltage, the second voltage and the node voltages. The device may include output circuitry that receives the first tracking voltage and the second tracking voltage from the gate tracking circuitry and provides the input-output pad voltage to the input-output pad based on the first tracking voltage and the second tracking voltage.