I/O Cell Array Single Gate Orientation Routing

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Solution Overview

Problem

The single lattice orientation of gates in integrated circuits (ICs) complicates the routing of conductive lines between I/O cells, leading to increased production costs, time, and electrostatic discharge risks due to serpentine patterns, which also hinder efficient connection between the core area and I/O cells.

Innovation Solution

The implementation of modularized I/O cells with uniform gate orientation, comprising pre-driver and post-driver modules offset at an angle, simplifies manufacturing and reduces production complexity by using a single etchant and uniform design, and employs a conductive line with a constant distance from the core area to minimize size increases and electrostatic discharge concerns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a serpentine pattern is used to route conductive lines between I/O cell elements, then the I/O cell can be formed with single gate orientation, but the routing complexity increases and production time increases

Engineering Contradiction:
Improvesingle gate orientation manufacturingVSAvoidproduction time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The I/O cell is divided into multiple modules, each containing specific circuit elements. This segmentation allows conductive lines to be routed directly between corresponding elements in adjacent modules without requiring serpentine patterns, thereby reducing routing complexity and production time while maintaining single gate orientation manufacturing benefits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a modular layout where modules are arranged in a systematic pattern with conductive lines extending between them. This dimensional organization transforms the routing problem from a two-dimensional serpentine path into a more efficient multi-dimensional connection scheme, reducing the number of turns and complexity in conductive line formation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If a serpentine pattern is used to route conductive lines, then single gate orientation is maintained, but the size of the I/O cell increases

Engineering Contradiction:
Improvesingle gate orientation manufacturingVSAvoidI/O cell size
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

By segmenting the I/O cell into compact modules with clearly defined boundaries and systematic arrangements, the patent enables more efficient space utilization. Conductive lines can be routed directly between modules without the need for space-consuming serpentine turns, thereby maintaining single gate orientation while reducing the overall I/O cell area

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple circuit elements and their interconnections into integrated modules. This consolidation eliminates the need for separate serpentine routing paths, as the modular structure inherently provides efficient connection paths, thereby reducing the total area required for the I/O cell while maintaining manufacturing simplicity

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If serpentine conductive lines are used, then single gate orientation is achieved, but the risk of short circuits increases

Engineering Contradiction:
Improvesingle gate orientation manufacturingVSAvoidshort circuit risk
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The modular segmentation of the I/O cell creates natural isolation between different circuit sections. Conductive lines are routed directly between corresponding elements in adjacent modules, avoiding the close proximity turns of serpentine patterns. This reduces the risk of short circuits while maintaining the manufacturing advantages of single gate orientation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The modular structure acts as an intermediary that organizes and separates conductive paths. By introducing module boundaries as intermediate structures, the patent creates natural spacing and isolation between conductive lines, reducing short circuit risk compared to direct serpentine routing while preserving single gate orientation manufacturing benefits

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If serpentine conductive lines are used, then single gate orientation is maintained, but electrostatic discharge damage risk increases

Engineering Contradiction:
Improvesingle gate orientation manufacturingVSAvoidelectrostatic discharge risk
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The modular segmentation of the I/O cell creates distributed structures that can better handle electrostatic discharge events. By dividing the circuit into separate modules with direct connection paths, the patent reduces the length and complexity of conductive lines, thereby minimizing the potential for electrostatic discharge damage while maintaining single gate orientation manufacturing advantages

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The modular structure with direct routing converts the potential harm of long, complex serpentine conductive lines into a benefit by creating shorter, more controlled paths. This segmentation transforms the routing complexity from a harmful factor into a design advantage that inherently reduces electrostatic discharge risk while preserving manufacturing simplicity

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20130194004A1Integrated circuit having input/output cell array having single gate orientation
Publication Date: 2013.08.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20130194004A1 patent drawing
  • US20130194004A1 patent drawing
  • US20130194004A1 patent drawing

AI summary

An integrated circuit (IC) including a core area containing active devices and at least one input/output (I/O) cell configured to transfer signals into and out of the core area. The at least one I/O cell includes a gate orientation, a pre-driver module, and at least one post-driver module. The pre-driver module and the at least one post-driver module are offset from each other by an angle between zero and ninety degrees with respect to the gate orientation. The gate orientation for every one of the at least one I/O cell is substantially the same.