Input Output Cell Current Mode Buffer Low Voltage
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Solution Overview
Problem
Existing CMOS IO cells struggle to handle low voltage supply conditions, leading to difficulties in testing digital cores under such conditions due to insufficient voltage headroom and the inability of voltage level shifter circuits to cope with low input voltage levels, which affects reliable signal transfer and Power-on-Reset level testing.
Innovation Solution
Incorporating IO cell circuitry that converts voltage outputs from the digital core to current signals, allowing for robust signal transfer across voltage domains, particularly under low voltage conditions, using mechanisms like virtual ground input/output cells and transimpedance amplifiers to facilitate reliable signal transportation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CMOS IO cells are used for voltage conversion, then voltage level shifting is achieved, but the cells cannot handle low voltage supply conditions
Solution Approach 1:
The patent introduces a current mode buffer as an intermediary component between the digital core and external circuitry. This buffer converts voltage signals to current signals and back, enabling reliable signal transfer under low voltage conditions where traditional voltage mode CMOS IO cells fail. The current mode buffer acts as a mediator that bridges the gap between different voltage domains while maintaining signal integrity.
Solution Approach 2:
The patent changes the operating parameter domain from voltage mode to current mode for the buffer circuitry. By operating the buffer in current mode rather than voltage mode, the system achieves better performance under low voltage conditions. The transimpedance amplifier converts current signals back to voltage signals, effectively changing the parameter representation throughout the signal path.
2Reliability
If voltage level shifter circuits are used, then voltage conversion is achieved, but insufficient voltage headroom prevents operation under low voltage conditions
Solution Approach 1:
The patent replaces the traditional voltage mode CMOS IO cell mechanism with a current mode buffer mechanism. This substitution eliminates the need for sufficient voltage headroom that plagues voltage mode circuits. The current mode operation uses transistors in a different region of operation, replacing the voltage-driven mechanism with a current-driven mechanism that is less sensitive to supply voltage variations.
3Adaptability or versatility
If current domain techniques are used, then robust signal transfer under low voltage conditions is achieved, but device complexity increases
Solution Approach 1:
The patent segments the IO cell functionality into distinct modules: a current mode buffer for voltage-to-current conversion, digital core interface circuitry, and external circuitry interface. This segmentation allows each module to be optimized independently for low voltage operation while maintaining overall system functionality. The modular approach manages complexity by breaking down the complex IO cell into manageable functional blocks.
Data Source
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AI summary
An integrated circuit and method are provided. The integrated circuit comprises: a digital core configured to output a first voltage signal; and a first input/output cell; wherein the first input/output cell is configured to convert the first voltage signal to a first current signal and provide the first current signal to circuitry external to the integrated circuit.