I/O Channel Scrambling Protocol for DRAM SSD Encoding
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Solution Overview
Problem
Standardized memory interfaces prevent non-standardized storage devices, such as DIMM-based SSDs, from operating on different I/O communication buses like DRAM channels without reverse engineering the host's encoding methods, leading to communication bottlenecks due to incompatible encoding schemes.
Innovation Solution
A communication protocol that enables a non-standardized storage device to decode encoded commands and provide status information on a standardized I/O channel like a DRAM channel without needing to reverse engineer the host's encoding methods, using a sequence of data patterns and addressable storage to interpret encoded commands and generate recognizable status data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a non-standardized storage device is connected to a standardized I/O channel, then communication compatibility is improved, but the device cannot decode encoded commands without reverse engineering the host's encoding methods
Solution Approach 1:
The patent introduces an intermediary training mechanism where the host writes training data patterns to the storage device, which includes encoded command data. The storage device stores these encoded patterns and uses them as reference to decode future commands. This intermediary training process enables the storage device to understand host encoding without requiring reverse engineering, thus resolving the contradiction between compatibility and complexity.
Solution Approach 2:
The patent applies preliminary action by performing encoding training before actual storage operations. During initialization, the host writes training data containing encoded commands to the storage device, and the device stores these patterns in addressable storage. This preliminary encoding establishment enables subsequent command decoding without real-time reverse engineering, reducing operational complexity while maintaining compatibility.
2Reliability
If encoding schemes are used on I/O channels, then data protection is improved, but communication between different I/O buses becomes incompatible
Solution Approach 1:
The patent makes the storage device universal by enabling it to operate on different I/O channels (DRAM channel, SATA, PCIe) through a common training mechanism. The device can acquire and store encoding patterns from any host interface, then use these stored patterns to decode commands regardless of the specific I/O bus type. This multi-functionality approach allows data protection through encoding while maintaining cross-platform compatibility.
Solution Approach 2:
The patent uses copying by having the storage device store copies of the host's encoded command patterns in its addressable storage. Instead of implementing the host's encoding scheme directly, the device copies the encoded patterns and uses them as reference keys for decoding. This copying mechanism preserves data protection benefits while enabling compatibility across different I/O buses without requiring the storage device to understand each bus's specific encoding methodology.
3Adaptability or versatility
If a storage device stores and decodes encoded commands, then communication on standardized I/O channels is enabled, but the device requires additional addressable storage for encoding patterns
Solution Approach 1:
The patent applies partial action by storing only the essential encoded command patterns in addressable storage, rather than storing all possible encoding variations. The training data includes a representative set of encoded commands that enable the storage device to decode future commands through pattern matching. This partial storage approach enables full I/O channel communication capability while minimizing the quantity of addressable storage required.
Data Source
AI summary
A protocol that enables communication between a host and an Input/Output (I/O) channel storage device, such as a Dynamic Random Access Memory (DRAM) channel Dual In-Line Memory Module (DIMM) form-factor Solid State Drive (SSD), without the need to know or reverse engineer the encoding applied by the host. The control/status data are written to the storage device by sending a protocol training sequence of known values and storing the associated command/status data in the storage device in the same encoding format as that received from the host. These stored values are used at run time to execute encoded commands received from the host and to report status data to the host in the host-recognizable manner. A memory bank-based buffered configuration stores user data also in the as-received condition to preserve the host-specific encoding. This facilitates exchange of user data between the host memory controller and the storage device over the DRAM channel.