I/O Duty Cycle Bias Control Without Inline Trim Delay
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Solution Overview
Problem
High-speed digital signaling in clock or data paths is prone to duty cycle distortion due to process and operational variations, leading to signaling errors, which traditional trim circuitry attempts to address but often introduces additional issues like delay, noise, and frequency limitations.
Innovation Solution
A direct current (DC) bias is applied between input/output stages to control duty cycle without inline circuitry, using a control circuit to adjust the DC bias between predriver and output stages, allowing for precise duty cycle trim without introducing additional delay or noise, and maintaining high-frequency operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional inline trim circuitry is used to adjust duty cycle, then duty cycle control is achieved, but additional delay and noise are introduced into the signal path
Solution Approach 1:
The patent extracts the trim adjustment function from the inline signal path and relocates it to a separate bias control circuit. The bias circuit adjusts the duty cycle by controlling the switching thresholds of the output stage without the signal actually passing through the trim components, thereby eliminating the harmful delay and noise that would result from placing trim circuitry directly in the high-speed signal path.
Solution Approach 2:
The patent introduces a bias signal as an intermediary between the control input and the output stage. This bias signal indirectly controls the duty cycle by adjusting the switching thresholds of the output buffer, rather than directly modifying the high-speed data signal. This intermediary approach allows duty cycle adjustment without degrading the main signal path.
2Manufacturing precision
If inline trim circuitry is placed in the high speed path to adjust duty cycle, then duty cycle adjustment is possible, but the frequency response is limited by a new bottom neck
Solution Approach 1:
The trim function is extracted from the critical high-speed signal path and implemented in a separate bias control circuit that operates at lower frequencies. The bias circuit modifies the switching characteristics of the output stage without being in the direct path of the high-frequency data signal, thus preserving the original frequency response and avoiding the creation of a new bandwidth bottleneck.
3Manufacturing precision
If traditional duty cycle trim circuitry is used, then duty cycle control is achieved, but poor linearity is introduced
Solution Approach 1:
The patent changes the control parameter from direct duty cycle adjustment in the signal path to bias voltage/current control of the output stage switching thresholds. By controlling the bias parameters of the output buffer, the duty cycle is adjusted in a more linear manner, as the bias control affects the switching points proportionally, improving the linearity of the overall control system.
Data Source
AI summary
An input/output (I/O) circuit provides a direct current (DC) bias between I/O stages to control duty cycle of the I/O. The I/O circuit can include one or more predriver stages and one or more output stages. The predriver stages can collectively be referred to as a predriver stage, and the output stages can collectively be referred to an output stage. The output stage for a transmitter drives the signal line. The output stage for an input buffer provides a receive signal for processing by the receiver. The I/O circuit includes a control circuit to control the DC bias between the stages to provide trim adjustment of a duty cycle for the output stage.