I/O Expander Circuit for Memory Subsystem Capacity Expansion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory sub-systems with input/output port constrained controllers face limitations in capacity expansion due to increased impedance load and signal integrity issues when using conventional passive expanders, leading to decreased performance and higher costs.
Innovation Solution
Implementing I/O expanders in each host channel to support multiple expansion channels without increasing impedance load, allowing for higher speed operations and increased storage capacity while maintaining acceptable data transfer rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional passive expanders are used to expand memory capacity, then storage capacity increases, but impedance load increases and signal integrity deteriorates
Solution Approach 1:
The patent introduces an I/O expander circuit as an intermediary component between the host channel and multiple memory devices. This active expander circuit mediates the connection, allowing multiple memory devices to be connected without directly increasing the impedance load on the host channel, thereby maintaining signal integrity while expanding storage capacity.
Solution Approach 2:
The patent changes the electrical parameters of the expansion interface by using an active I/O expander circuit that can control impedance matching and signal levels. This allows the system to maintain proper signal integrity parameters even when connecting multiple memory devices, unlike passive expanders that simply add impedance loads.
2Quantity of substance
If multiple memory devices are connected to increase capacity, then storage capacity increases, but data transfer rate decreases
Solution Approach 1:
The patent segments the connection between the host channel and memory devices by introducing an I/O expander circuit that can manage multiple expansion channels. This segmentation allows data to be transferred through dedicated paths, maintaining high transfer rates while connecting multiple memory devices to increase overall storage capacity.
3Quantity of substance
If additional host channels are added to support more memory devices, then storage capacity increases, but device complexity and cost increase
Solution Approach 1:
The patent implements a multi-functional I/O expander circuit that can support multiple memory devices through a single host channel. This universal expander circuit performs the function of multiple channels, allowing the system to increase storage capacity without proportionally increasing controller complexity or requiring additional host channels.
Data Source
AI summary
A memory sub-system includes a memory sub-system controller comprising at least one host channel, a memory device comprising a plurality of memory die, and at least one input/output (I/O) expander circuit coupled between the at least one host channel of the memory sub-system controller and to the memory device to connect the plurality of memory die to the memory sub-system controller. The at least one I/O expander circuit is to limit an impedance load presented on the at least one host channel to an impedance load of a corresponding subset of the plurality of memory die selected during a given time period.