Input/Output Expansion Substrate for Stacked IC Package Density
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Solution Overview
Problem
Existing integrated circuit packaging technologies face challenges in increasing functional density within reduced size and cost constraints, particularly in providing effective input/output expansion and electrical connections in stacked packages, which limits the ability to stack high pin count devices and increases manufacturing costs.
Innovation Solution
The proposed solution involves forming a base stacking package by fabricating a base substrate, mounting an integrated circuit, positioning an input/output expansion substrate with access ports, and injecting a molding compound, followed by mounting a top package on the input/output expansion substrate, which allows for increased input/output connections and expanded functional density without significantly increasing package thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple integrated circuits are stacked within a standard package footprint, then functional density is improved, but electrical connection complexity and clearance space requirements worsen
Solution Approach 1:
The patent transitions from planar electrical connections to three-dimensional vertical connections by stacking packages. The input/output expansion substrate provides access ports around the inner array area, enabling electrical connections in multiple spatial dimensions rather than limited to a single plane, thus resolving the contradiction between increased functional density and connection complexity.
Solution Approach 2:
The input/output expansion substrate acts as an intermediary component between stacked integrated circuits. It provides a standardized interface with access ports that simplifies electrical connections by mediating the complex interconnections between multiple stacked devices, reducing overall system complexity while enabling higher functional density.
2Quantity of substance
If the number of input/output interconnects is increased, then functional capacity is improved, but package thickness and space requirements worsen
Solution Approach 1:
The patent utilizes vertical stacking to accommodate increased numbers of input/output interconnects without proportionally increasing package thickness. By arranging interconnects across multiple stacked layers with access ports distributed around the inner array area, the system achieves high interconnect density while maintaining compact package dimensions.
Solution Approach 2:
The input/output expansion substrate is positioned over the integrated circuit within the same package footprint, creating a nested configuration. This nesting allows multiple functional layers to coexist in a compact arrangement, enabling increased interconnect capacity without significant increases in package thickness.
3Ease of manufacture
If existing manufacturing methods are reused to reduce cost, then manufacturing cost is improved, but package dimension reduction capability worsens
Solution Approach 1:
The input/output expansion substrate serves multiple functions: it provides electrical connections, enables package stacking, and maintains compatibility with existing manufacturing processes. This multi-functionality allows the system to achieve dimension reduction while using established manufacturing methods, resolving the contradiction between cost efficiency and package size reduction.
Solution Approach 2:
The package system is segmented into modular components (base substrate, integrated circuits, input/output expansion substrate) that can be manufactured separately using existing processes and then assembled. This segmentation enables cost-effective production while achieving compact integrated package dimensions through precise assembly of smaller components.
Data Source
AI summary
An integrated circuit package system includes: forming a base stacking package including: fabricating a base substrate, mounting an integrated circuit on the base substrate, positioning an input/output expansion substrate, having access ports around an inner array area, over the integrated circuit, and injecting a molding compound on the base substrate, the integrated circuit, and the input/output expansion substrate; and mounting a top package on the input/output expansion substrate.