IO Failsafe Circuit for Ultra-Low PAD Current During Power Sequencing
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Solution Overview
Problem
Integrated circuits (ICs) in portable media devices face challenges in controlling PAD current during power-up and power-down sequences, leading to high leakage currents due to untristated IO circuits, which is critical for low-power methodologies like Switchable Power-Domains in Core-logic and interfaces like SLIMbus requiring ultra-low PAD current.
Innovation Solution
The implementation of a supply detector cell and failsafe circuit that detects core supply voltage and PAD voltage to control leakage current through the de-activation of final driver circuits, ensuring zero static leakage current and ultra-low PAD current during power transitions by translating core supply voltage levels to IO supply voltage levels and using level shifter circuits and predriver logic to manage IO circuit operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If IO circuits are kept active during power transitions, then signal transmission is maintained, but leakage current increases significantly
Solution Approach 1:
The failsafe circuit activates before the IO supply voltage reaches its final level, preemptively deactivating the driver circuit to prevent leakage current. The supply detector cell detects the core supply voltage state in advance, and the failsafe circuit responds by controlling the driver circuit before the harmful leakage condition can occur.
Solution Approach 2:
The supply detector cell continuously monitors the core supply voltage and provides feedback to the failsafe circuit. This feedback mechanism allows the system to detect changes in power state and automatically adjust the driver circuit activation state, creating a closed-loop control system that prevents leakage current while maintaining signal transmission when needed.
2Loss of energy
If driver circuit is deactivated to reduce leakage current, then power consumption decreases, but signal transmission capability is lost
Solution Approach 1:
The system dynamically adjusts the activation state of the driver circuit based on real-time detection of core supply voltage and IO supply voltage levels. The driver circuit transitions between active and deactivated states according to the power transition phase, optimizing the balance between power consumption and signal transmission capability at each moment.
Solution Approach 2:
The failsafe circuit changes the operational parameters of the driver circuit based on detected voltage levels. When the core supply voltage indicates a power transition state, the driver circuit parameter changes from active to deactivated, and when stable power is detected, it returns to active, adapting its behavior to the current power state.
3Loss of energy
If multiple detection and control circuits are added to achieve fail-safe compliance, then leakage current control improves, but device complexity increases
Solution Approach 1:
The supply detector cell and failsafe circuit are integrated into a unified control mechanism that shares detection and control resources. The same detection infrastructure monitors both core supply voltage and IO supply voltage, and the failsafe circuit consolidates the control logic for multiple driver circuits, reducing overall complexity while maintaining effective leakage current control.
Solution Approach 2:
The supply detector cell serves multiple functions: detecting core supply voltage state, triggering the failsafe circuit, and enabling coordinated control of the driver circuit. The failsafe circuit itself performs multiple roles including voltage level translation, logic inversion, and driver circuit control, making the added components highly versatile and justifying their inclusion despite the complexity increase.
Data Source
AI summary
An input/output (IO) circuit powered by an input/output (IO) supply voltage. The IO circuit includes a supply detector cell that detects a core supply voltage and generates a supply detect signal. A driver circuit is connected to a PAD and the driver circuit receives the supply detect signal. A failsafe circuit receives a PAD voltage. The failsafe circuit and the supply detector cell controls a leakage current from the PAD based on the IO supply voltage and the PAD voltage.