I/O Keeper Cell Wake-Up Restore for Low-Power State Retention

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Solution Overview

Problem

Current low power mode implementations in integrated circuit devices reset I/O control and data states upon waking, potentially disturbing connected devices, as they revert to default states, leading to unintended actions.

Innovation Solution

Incorporating a 'low power mode wake-up and restore' signal to manage I/O keeper cells, allowing them to maintain and restore previously set I/O configurations and data states when the device exits low power mode, ensuring seamless integration with other electronic system components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the integrated circuit device enters low power mode to reduce leakage currents, then power consumption is reduced, but the I/O control and data states are reset to default states upon waking, causing disturbances to connected devices

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The keeper cell is pre-configured to retain I/O control and data states before the device enters low power mode. This preliminary action ensures that when the device wakes up, the keeper cell immediately restores the previous states without resetting them, thus preventing disturbances to connected devices while maintaining power savings

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The keeper cell acts as an intermediary element between the I/O interface and the internal logic circuits. It buffers and retains the I/O control and data states, allowing the internal logic to power down while the I/O interface maintains stable states, thereby decoupling the power management from the I/O stability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If standard I/O keeper cells are used to retain I/O control and data states during low power mode, then system stability is maintained, but the states are reset upon waking from low power mode, causing unintended actions

Engineering Contradiction:
Improvesystem stabilityVSAvoidI/O control and data state
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The keeper cell is pre-configured to retain I/O control and data states before the device enters low power mode. This preliminary action ensures that when the device wakes up, the keeper cell immediately restores the previous states without resetting them, thus preventing disturbances to connected devices while maintaining power savings

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where the keeper cell continuously monitors and maintains the I/O control and data states. Upon waking from low power mode, the keeper cell detects the state transition and automatically restores the previous values, creating a self-correcting system that prevents information loss

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7589564B2Method of maintaining input and/or output configuration and data states during and when coming out of a low power mode
Publication Date: 2009.09.15 MICROCHIP TECHNOLOGY INC
  • US7589564B2 patent drawing
  • US7589564B2 patent drawing
  • US7589564B2 patent drawing

AI summary

A semiconductor integrated circuit device upon exiting from a low power mode, wakes up and re-initializes logic circuits so as to restore previous logic states of internal registers without disturbing input-output (I/O) configuration control and data states present at the time the low power mode was entered. Thus not distributing the operation of other devices connected to the semiconductor integrated circuit device previously in the low power mode. Once all internal logic and registers of the semiconductor integrated circuit device have been re-initialized, a “low power state wake-up and restore” signal may issue. This signal indicates that the I/O configuration control and data states stored in the I/O keeper cell at the time the integrated circuit device entered into the low power mode have been reinstated and control may be returned to the logic circuits and/or internal registers of the semiconductor integrated circuit device.