Design-Specific I/O Model Document Generation for Board-Level Simulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current circuit design simulation methods fail to accurately characterize the input/output (I/O) behavior of individual integrated circuit (IC) pins at the board level, as simulation data from IC designs does not convey necessary information for board-level interactions, and existing techniques like IBIS models do not reveal the inner workings of ICs.
Innovation Solution
A design-specific I/O model document is created by reading and selecting I/O pin models from a generic I/O model document based on the I/O pin profiles of the target device, allowing for the generation of a document that specifies the behavior of I/O pins for a given circuit design, independent of Electronic Design Automation (EDA) tools, enabling accurate board-level simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If standard IBIS models are used to characterize I/O behavior, then board-level simulation capability is provided, but the models do not reveal inner workings of ICs and lack design-specific accuracy
Solution Approach 1:
The patent creates a copy of the IBIS model structure specifically tailored for the circuit design by extracting relevant I/O pin information from the design and populating it with design-specific parameters. This copied model structure maintains the standard IBIS format while incorporating design-specific characteristics, achieving both accuracy and information protection.
2Adaptability or versatility
If EDA tools are used to maintain I/O pin models, then comprehensive model management is provided, but updates require re-installing EDA tools
Solution Approach 1:
The patent extracts the I/O model generation capability from the EDA tool itself and implements it as a standalone process that reads design information directly and generates IBIS models independently. This extraction allows model updates to occur without requiring EDA tool re-installation, as the generation process can be executed separately whenever design changes occur.
3Reliability
If design-specific I/O models are generated, then accurate board-level simulation is enabled, but the process requires reading and processing multiple I/O pin models
Solution Approach 1:
The patent segments the I/O model generation process into distinct steps: identifying I/O pins in the circuit design, determining their profiles based on electrical characteristics, selecting appropriate models from available options, and assembling them into a design-specific IBIS model. This segmentation manages the complexity by breaking down the overall task into manageable, systematic operations.
Data Source
AI summary
A method of creating a design-specific I/O model document can include reading a plurality of I/O pin models corresponding to available I/O pin profiles on a target device (355) and identifying I/O pins of the target device that are used by a circuit design (325). An I/O pin profile for each I/O pin of the target device that is used by the circuit design can be determined (345). An I/O pin model can be selected from the plurality of I/O pin models for each I/O pin of the target device that is used by the circuit design according to the I/O pin profiles (355). The design-specific I/O model document for the circuit design can be generated by including each selected I/O pin model within the design-specific I/O model document (365). The design-specific I/O model document can be output (380).