I/O Pad Termination Switching for High-Speed Transceiver Channels

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Solution Overview

Problem

The input capacitance component in semiconductor devices with termination resistors limits high-speed operation in multi-stack package semiconductor devices, hindering signal integrity and integration.

Innovation Solution

A transceiver system with semiconductor devices having I/O pads connected to an I/O channel, where one device terminates with a first voltage and drives using it when receiving data, and another device terminates with a higher voltage and drives using it when transmitting, utilizing NMOS and PMOS transistors with pull-down and pull-up resistors to manage signal states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a termination resistor is used in the I/O circuit, then signal reflection is minimized and signal integrity is improved, but input capacitance increases which limits high-speed operation

Engineering Contradiction:
Improvesignal integrityVSAvoidoperation speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies dynamics by making the termination voltage selectable between two different voltage levels (first voltage and second voltage higher than the first voltage) depending on the operation mode. The I/O circuit dynamically switches between termination modes: using first voltage termination during receive operations and second voltage termination during transmit operations, allowing optimization for both high-speed operation and signal integrity under different conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the termination voltage parameter from a fixed value to a variable that can be set to either a first voltage or a second voltage (higher than the first). This parameter change allows the system to reduce input capacitance effects by using appropriate voltage levels for different operational states, thereby enabling high-speed operation while maintaining signal integrity when needed

Inventive Principle:
Principle #35Parameter changes

2Reliability

If termination resistor is used to minimize signal reflection, then signal integrity improves, but the input capacitance component limits multi-stack package performance

Engineering Contradiction:
Improvesignal integrityVSAvoidintegration degree
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent enables dynamic switching between different termination voltage modes to accommodate multi-stack package requirements. By selectively applying higher termination voltage during transmit operations and lower termination voltage during receive operations, the system achieves both high signal integrity and the high-speed performance necessary for multi-stack package integration

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The termination voltage parameter is changed from a single fixed value to a dual-value system where the I/O circuit can operate with either a first voltage or a second voltage (higher than the first). This parameter flexibility reduces input capacitance limitations and enables higher productivity and integration degree in multi-stack package semiconductor devices

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8149015B2Transceiver system, semiconductor device thereof, and data transceiving method of the same
Publication Date: 2012.04.03 SAMSUNG ELECTRONICS CO LTD
  • US8149015B2 patent drawing
  • US8149015B2 patent drawing
  • US8149015B2 patent drawing

AI summary

A transceiver system includes a first semiconductor device having a first input/output (I/O) pad connected with an I/O channel and a second semiconductor device having a second I/O pad connected with the I/O channel. The first semiconductor device is configured to terminate the first I/O pad with a first voltage when data is received, and maintain the first I/O pad and the I/O channel at the first voltage when data is transmitted. The second semiconductor device is configured to terminate the second I/O pad with a second voltage higher than the first voltage when data is received, and maintain the second I/O pad and the I/O channel at the second voltage when data is transmitted.