Ion Beam Etching Stepped Profile 3D Memory
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Solution Overview
Problem
Conventional two-dimensional semiconductor devices face limitations in integration density due to the high cost and complexity of forming fine patterns, while three-dimensional semiconductor devices are expensive per bit, necessitating cost-effective and reliable manufacturing processes.
Innovation Solution
A method for manufacturing semiconductor devices involves forming a stack structure with a mask pattern and using ion beam etching with adjustable tilt angles to create a stepped profile, minimizing the loss of the mask pattern and reducing the number of additional mask patterns required, thereby simplifying processes and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional two-dimensional semiconductor devices use fine pattern formation techniques to increase integration density, then integration density is improved, but manufacturing cost increases due to extremely high-priced apparatuses being needed
Solution Approach 1:
The patent transitions from two-dimensional planar structures to three-dimensional vertically stacked structures. Multiple memory cell layers are stacked vertically on the substrate, enabling integration density to increase without requiring finer lateral patterning. This dimensional change allows achieving high integration density using relatively coarser pattern formation techniques, thereby reducing manufacturing costs.
2Manufacturing precision
If three-dimensional semiconductor devices are manufactured to overcome integration density limitations, then integration density is improved, but cost per bit becomes expensive compared to two-dimensional devices
Solution Approach 1:
The three-dimensional structure is segmented into multiple discrete memory cell layers stacked vertically. Each layer can be independently formed and processed, allowing for modular manufacturing. This segmentation enables the use of standard fabrication techniques for each layer rather than requiring entirely new expensive processes, thereby reducing cost per bit while maintaining high integration density.
Solution Approach 2:
Common structures such as the stack structure (alternating insulating layers and sacrificial layers) and mask patterns are formed preliminarily before the actual memory cell formation. These preliminary structures serve as templates for subsequent memory cell layer formation, reducing the number of expensive patterning steps needed and lowering overall manufacturing costs.
3Ease of manufacture
If ion beam etching is performed with a single tilt angle to etch the stack structure, then manufacturing process is simple, but mask pattern loss increases requiring additional mask patterns
Solution Approach 1:
The ion beam etching process uses dynamic adjustment of tilt angles during different stages of etching. The tilt angle is changed between pad etching and mask etching processes, allowing optimization of etching selectivity and profile control. This dynamic parameter adjustment minimizes mask pattern loss while maintaining process simplicity, eliminating the need for additional mask patterns.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for increased integration density and reduced manufacturing costs by optimizing the etching process to achieve a stepped profile in semiconductor devices, enhancing the efficiency and affordability of three-dimensional semiconductor production.
Implementation Method 1
The performing of the mask etching process may include irradiating an ion beam onto the mask pattern. The ion beam may be irradiated at a first tilt angle with respect to the sidewall of the mask pattern and may be irradiated at a second tilt angle with respect to a top surface of the mask pattern.
Data Source
AI summary
Methods for manufacturing semiconductor devices may include forming a stack structure including layers stacked on a substrate, forming a mask pattern on the stack structure, and patterning the stack structure using the mask pattern such that the stack structure has an end portion with a stepped profile. The patterning of the stack structure may include performing a pad etching process of etching the stack structure using the mask pattern as an etch mask, and performing a mask etching process of etching a sidewall of the mask pattern. The performing of the mask etching process may include irradiating an ion beam onto the mask pattern, which may be irradiated at a first tilt angle with respect to the sidewall of the mask pattern and at a second tilt angle with respect to a top surface of the mask pattern. The first tilt angle may be different from the second tilt angle.