Ion-Implanted Carrier Wafer for Semiconductor Bonding

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Solution Overview

Problem

Existing methods for temporarily bonding semiconductor wafers to reinforcing substrates, such as adhesive bonding and direct wafer bonding, face challenges like temperature instability, outgassing, and damage to semiconductor devices during processing, which compromise the integrity and mechanical stability of the bond.

Innovation Solution

Ion implantation is used to create a weakened region in a carrier wafer, allowing it to be directly bonded to a semiconductor structure without adhesives, providing mechanical support during processing and enabling separation post-processing, while also allowing for direct bonding of conductive structures and subsequent division of the carrier wafer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If adhesive materials are used for wafer bonding, then mechanical support and structural stability are provided during processing, but temperature instability and outgassing occur at elevated temperatures

Engineering Contradiction:
Improvemechanical supportVSAvoidbond integrity
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent removes the adhesive material layer from the bonding structure, transitioning from adhesive bonding to direct wafer bonding. This extraction eliminates the source of temperature instability and outgassing while maintaining the mechanical support function through direct semiconductor-to-semiconductor bonding

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary process (surface preparation and direct bonding) between the wafer and carrier substrate, replacing the adhesive intermediary with a direct bond that maintains structural stability without the harmful thermal and chemical properties of adhesive materials

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If semiconductor wafers are thinned for improved heat dissipation and reduced electrical resistance, then electrical performance is enhanced, but the wafers become brittle and susceptible to cracking

Engineering Contradiction:
Improveelectrical performanceVSAvoidmechanical strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies a carrier substrate to the thinned semiconductor wafer before subsequent processing steps. This carrier substrate acts as a cushioning support that prevents cracking and fracture during handling and processing, allowing the wafer to maintain its thinned state for improved electrical performance while gaining mechanical strength from the carrier

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Loss of substance

If chemical removal processes are used to remove adhesive materials, then the adhesive is completely removed, but the process is time-consuming and damaging to semiconductor devices

Engineering Contradiction:
Improveadhesive removalVSAvoidprocessing time
Core Design Contradiction:
Loss of substanceVSProductivity

Solution Approach 1:

The patent extracts the adhesive material layer entirely from the bonding process, replacing it with direct wafer bonding. This eliminates the need for subsequent chemical removal processes, thereby reducing processing time and avoiding damage to semiconductor devices while achieving complete removal of the bonding interface material

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the chemical removal system with a mechanical/direct bonding system. Instead of using chemical processes to remove adhesive materials, the invention uses direct physical bonding between wafers, eliminating the need for time-consuming and potentially damaging chemical etching or dissolution steps

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the mechanical stability and processing flexibility of semiconductor structures, reduces the risk of damage, and eliminates the limitations of temperature and pressure associated with adhesive bonding, enabling efficient fabrication of three-dimensional semiconductor structures.

Implementation Method 1

Ions are implanted into a carrier wafer to form a weakened region within the carrier wafer

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

A layer of material from the carrier wafer is separated from a remaining portion of the carrier wafer along the weakened region therein

Methodology Applied
Scientific EffectStress concentration:

Data Source

PatentUS9553014B2Bonded processed semiconductor structures and carriers
Publication Date: 2017.01.24 SOITEC SA
  • US9553014B2 patent drawing
  • US9553014B2 patent drawing
  • US9553014B2 patent drawing

AI summary

Methods of fabricating semiconductor structures include implanting atom species into a carrier die or wafer to form a weakened region within the carrier die or wafer, and bonding the carrier die or wafer to a semiconductor structure. The semiconductor structure may be processed while using the carrier die or wafer to handle the semiconductor structure. The semiconductor structure may be bonded to another semiconductor structure, and the carrier die or wafer may be divided along the weakened region therein. Bonded semiconductor structures are fabricated using such methods.