Silicide Conductive Contact for Ion TSVs at Low Annealing Temperature

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Solution Overview

Problem

The challenge in 3D integrated circuits (ICs) is forming a good electrical connection between conductive contacts and ion through-substrate vias (TSVs) using materials like titanium or titanium nitride, which have high resistivity, leading to reduced performance and potential damage from high annealing temperatures.

Innovation Solution

Forming conductive contacts with low resistivity silicide, such as nickel silicide, through a controlled annealing process at lower temperatures (up to 410 degrees Celsius) to create an ohmic contact with ion TSVs, minimizing damage to semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high annealing temperatures are used to form conductive contacts with titanium or titanium nitride, then electrical connection is improved, but damage to semiconductor devices increases

Engineering Contradiction:
Improveelectrical connectionVSAvoiddamage to semiconductor devices
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the temperature parameter from high annealing temperatures to low annealing temperatures (below 400°C) to form the conductive contact. This parameter change allows the formation of a low-resistivity silicide contact without causing thermal damage to the semiconductor devices, thus resolving the contradiction between achieving good electrical connection and avoiding device damage

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite material approach by forming a silicide compound (such as nickel silicide or titanium silicide) through the reaction between a conductive material layer and the semiconductor substrate. This composite silicide layer provides both low resistivity for good electrical connection and compatibility with low-temperature processing, eliminating the need for high-temperature annealing

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If titanium or titanium nitride is used for conductive contacts, then manufacturing is simplified, but resistivity is high leading to reduced performance

Engineering Contradiction:
Improveconductive contact formationVSAvoidelectrical connection performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the resistivity parameter by forming a silicide compound with resistivity below 25 micro-Ohms centimeter through low-temperature annealing. This achieves low-resistivity electrical contact while maintaining the simplicity of the deposition process, thus resolving the contradiction between ease of manufacture and electrical connection performance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the mechanical/thermal process of high-temperature annealing with a chemical reaction process where the conductive material reacts with the semiconductor substrate to form a silicide compound at low temperatures. This substitution achieves low-resistivity contact without requiring high-temperature thermal processing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures a good electrical connection while reducing damage to semiconductor devices, enhancing performance and reducing fabrication time and costs in 3D ICs.

Implementation Method 1

performing an annealing process to form an upper conductive layer within the first semiconductor substrate, wherein the upper conductive layer comprises a silicide of the conductive material and the semiconductor material

Methodology Applied
Scientific EffectSilicide formation through annealing: Diffusion

Data Source

PatentUS12364048B2Conductive contact for ion through-substrate via
Publication Date: 2025.07.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12364048B2 patent drawing
  • US12364048B2 patent drawing
  • US12364048B2 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an integrated chip including a first substrate having a front-side and a back-side opposite the front-side. A first doped region is in the first substrate and extends continuously from the front-side to the back-side. A conductive contact is over the first doped region. A conductive layer is between the first doped region and the conductive contact. The first doped region abuts a lower surface and sides of the conductive layer.