Package-on-Package I/O Layout Footprint for 1LM and 2LM Memory Configurations

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Solution Overview

Problem

Current system memory technologies face challenges in optimizing performance, cost, and power consumption, particularly in supporting both single-level and multi-level memory configurations, which limits the flexibility and efficiency of computing systems.

Innovation Solution

Implementing a multi-tiered system memory architecture with 'near memory' and 'far memory' configurations, where near memory uses faster, volatile technologies like DRAM for higher priority data and far memory employs emerging non-volatile technologies with lower access latency, and integrating these within a common hardware platform to support both 1LM and 2LM configurations through a package-on-package structure with optimized I/O layout footprints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-level memory configuration is used, then the hardware layout is simple, but the system memory performance and power consumption are suboptimal

Engineering Contradiction:
Improvehardware layout complexityVSAvoidsystem memory performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory system is segmented into two distinct levels: near memory (first level) and far memory (second level). Each level has its own dedicated I/O interfaces and can be independently configured, allowing the system to achieve high performance through the fast near memory while maintaining simplicity by enabling optional deployment of the far memory level.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a multi-level memory configuration is implemented, then system memory performance improves, but the hardware layout and I/O interface requirements become more complex

Engineering Contradiction:
Improvesystem memory performanceVSAvoidhardware layout complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system is designed with universal I/O interface structures that can serve both near memory and far memory configurations. The same basic I/O layout footprint and substrate designs are used across different configuration types (1LM, 2LM, stacked, non-stacked), allowing the hardware platform to be reused across multiple memory architectures without requiring completely different layouts for each configuration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Use of energy by moving object

If different memory technologies are used for near and far memory, then power consumption is optimized, but the device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

Different memory technologies are assigned to different levels based on their specific performance and power characteristics. The near memory uses faster, lower-power technologies for frequently accessed data, while the far memory uses different technologies for less frequently accessed data. This local differentiation allows the system to optimize overall power consumption by matching memory technology to access patterns without requiring complete heterogeneity throughout the entire system.

Inventive Principle:
Principle #3Local quality

4Manufacturing precision

If the I/O layout footprint is optimized for specific memory configurations, then manufacturing precision is improved, but the adaptability to different configurations decreases

Engineering Contradiction:
ImproveI/O layout precisionVSAvoidconfiguration flexibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

A universal I/O layout footprint is designed that can accommodate multiple memory configurations (1LM, 2LM, stacked, non-stacked) using the same basic substrate and interface structures. The layout includes standardized I/O regions that can be configured for different memory types and arrangements, allowing high manufacturing precision through reuse of proven designs while maintaining adaptability to support various memory architecture choices.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10304814B2I/O layout footprint for multiple 1LM/2LM configurations
Publication Date: 2019.05.28 TAHOE RES LTD
  • US10304814B2 patent drawing
  • US10304814B2 patent drawing
  • US10304814B2 patent drawing

AI summary

An apparatus is described. The apparatus includes a package on package structure. The package on package structure includes an upper package and a lower package. One of the packages contain memory devices of a first type and the other of the packages contain memory devices of a second type. I/O connections on the underside of the upper package's substrate are vertically aligned with their corresponding, first I/O connections on the underside of the lower package's substrate. The first I/O connections are located outside second I/O connections on the underside of the lower package's substrate for the lower package.