IoT Internal Time Synchronization Using Transport Delay Correction
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Solution Overview
Problem
The precision of clock synchronization in Time Sensitive Networking (TSN) is limited by the discrepancy between software and network clocks, leading to increased latency and jitter in time-sensitive applications, which affects network performance in IoT devices.
Innovation Solution
IoT devices implement an additional serial signal wire between a central timer and I/O devices to determine and correct transport delays, enabling precise internal time synchronization by calculating transport delay values and adjusting timestamps accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If software repeatedly samples internal time and network time on NIC, then clock synchronization is achieved, but precision is limited by minimum read latency between processor and network time
Solution Approach 1:
The patent introduces an intermediary mechanism (transport delay correction manager and serial signal wire) that mediates between the processor and network interface controller to measure and correct transport delays, thereby achieving higher precision time synchronization without being constrained by processor read latency
Solution Approach 2:
The patent replaces the software-based sampling mechanism with a hardware-based timestamp correction mechanism using a dedicated serial signal wire and correction manager, substituting the mechanical/processor-dependent time measurement system with a specialized hardware path that achieves higher precision
2Reliability
If TSN controllers are integrated into embedded designs, then network synchronization capability is improved, but internal time synchronization precision between software clock and network clock remains limited
Solution Approach 1:
The patent segments the time synchronization function into separate components: a central timer, I/O devices with local timers, and a transport delay correction manager. This segmentation allows each component to be optimized independently, with the correction manager specifically addressing the precision gap between software and network clocks
Solution Approach 2:
The transport delay correction manager acts as an intermediary that measures and corrects the transport delay between the network interface controller and processor, bridging the precision gap between network time and software clock without requiring changes to the core TSN controller architecture
3Measurement precision
If additional serial signal wire is added between central timer and I/O devices, then transport delay measurement precision is improved, but device complexity increases
Solution Approach 1:
The system performs self-measurement of transport delays using the additional serial signal wire, with the correction manager automatically measuring delays and applying corrections without external intervention. The system serves itself by using the hardware extension to measure and correct its own timing errors
Solution Approach 2:
The serial signal wire serves as an intermediary communication path dedicated solely to timestamp exchange between the central timer and I/O devices, separating the timing measurement function from other data communications and enabling precise delay measurement without interfering with normal device operations
Data Source
AI summary
Technologies for managing internal time synchronization include an internet-of-things (IoT) device configured to determine a transport delay value as a function of a transmit path delay corresponding to a first message transmitted from an I/O device of the IoT device to a central timer of the IoT device and a receive path delay corresponding to a second message transmitted from the central timer to the I/O device. The IoT device is further configured to update, in response to having received a broadcast message from the central timer subsequent to having determined the transport delay value, a timestamp value of the received broadcast message as a function of the transport delay value. Other embodiments are described herein.